1/*
2 * Copyright (c) 2018 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <mem.h>
8#include <st/f3/stm32f373.dtsi>
9
10/ {
11	sram0: memory@20000000 {
12		reg = <0x20000000 DT_SIZE_K(32)>;
13	};
14
15	soc {
16		flash-controller@40022000 {
17			flash0: flash@8000000 {
18				reg = <0x08000000 DT_SIZE_K(256)>;
19			};
20		};
21
22		dma2: dma@40020400 {
23			compatible = "st,stm32-dma-v2bis";
24			reg = <0x40020400 0x400>;
25			clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
26			interrupts = <56 0 57 0 58 0 59 0 60 0>;
27			status = "disabled";
28		};
29
30		dac2: dac@40009800 {
31			compatible = "st,stm32-dac";
32			reg = <0x40009800 0x400>;
33			clocks = <&rcc STM32_CLOCK(APB1, 26U)>;
34			status = "disabled";
35			#io-channel-cells = <1>;
36		};
37	};
38};
39