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Searched refs:sCommonRegs (Results 1 – 23 of 23) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_hrtim.c786 CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart()
787 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart()
792 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart()
793 MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate); in HAL_HRTIM_DLLCalibrationStart()
794 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart()
839 CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart_IT()
840 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart_IT()
845 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart_IT()
846 MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate); in HAL_HRTIM_DLLCalibrationStart_IT()
847 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart_IT()
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_hrtim.c772 CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart()
773 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart()
778 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart()
779 MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate); in HAL_HRTIM_DLLCalibrationStart()
780 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart()
825 CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart_IT()
826 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart_IT()
831 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart_IT()
832 MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate); in HAL_HRTIM_DLLCalibrationStart_IT()
833 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart_IT()
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_hrtim.c1391 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart()
1441 hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; in HAL_HRTIM_SimpleOCStop()
1501 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_IT()
1557 hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; in HAL_HRTIM_SimpleOCStop_IT()
1642 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_DMA()
1731 hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; in HAL_HRTIM_SimpleOCStop_DMA()
1955 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart()
2005 hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; in HAL_HRTIM_SimplePWMStop()
2056 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_IT()
2146 hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; in HAL_HRTIM_SimplePWMStop_IT()
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_hrtim.h1581 SET_BIT(HRTIMx->sCommonRegs.CR1, ((Timers >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR1_UDIS_MASK)); in LL_HRTIM_SuspendUpdate()
1605 CLEAR_BIT(HRTIMx->sCommonRegs.CR1, ((Timers >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR1_UDIS_MASK)); in LL_HRTIM_ResumeUpdate()
1629 SET_BIT(HRTIMx->sCommonRegs.CR2, ((Timers >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR2_SWUPD_MASK)); in LL_HRTIM_ForceUpdate()
1652 …SET_BIT(HRTIMx->sCommonRegs.CR2, (((Timers >> HRTIM_MCR_MCEN_Pos) << HRTIM_CR2_MRST_Pos) & HRTIM_C… in LL_HRTIM_CounterReset()
1683 SET_BIT(HRTIMx->sCommonRegs.OENR, (Outputs & HRTIM_OENR_OEN_MASK)); in LL_HRTIM_EnableOutput()
1714 SET_BIT(HRTIMx->sCommonRegs.ODISR, (Outputs & HRTIM_OENR_ODIS_MASK)); in LL_HRTIM_DisableOutput()
1745 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == Output) ? 1UL : 0UL); in LL_HRTIM_IsEnabledOutput()
1776 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == 0U) ? 1UL : 0UL); in LL_HRTIM_IsDisabledOutput()
2003 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.ADC1R) + in LL_HRTIM_ConfigADCTrig()
2005 MODIFY_REG(HRTIMx->sCommonRegs.CR1, (HRTIM_CR1_ADC1USRC << shift), (Update << shift)); in LL_HRTIM_ConfigADCTrig()
[all …]
Dstm32f3xx_hal_hrtim.h2823 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == (uint32_t)RESET)\
2830 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == (uint32_t)RESET)\
2837 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == (uint32_t)RESET)\
2844 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == (uint32_t)RESET)\
2851 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == (uint32_t)RESET)\
2873 #define __HAL_HRTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER…
2874 #define __HAL_HRTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER …
2930 …GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->sCommonRegs.IER & (__INTERR…
2991 #define __HAL_HRTIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.ICR …
3072 #define __HAL_HRTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->sCommonRegs.ISR…
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_hrtim.h2241 …CLEAR_BIT(HRTIMx->sCommonRegs.CR1, ((LL_HRTIM_TIMER_ALL >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR1_UDIS_MA… in LL_HRTIM_SuspendUpdate()
2242 SET_BIT(HRTIMx->sCommonRegs.CR1, ((Timers >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR1_UDIS_MASK)); in LL_HRTIM_SuspendUpdate()
2268 CLEAR_BIT(HRTIMx->sCommonRegs.CR1, ((Timers >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR1_UDIS_MASK)); in LL_HRTIM_ResumeUpdate()
2294 SET_BIT(HRTIMx->sCommonRegs.CR2, ((Timers >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR2_SWUPD_MASK)); in LL_HRTIM_ForceUpdate()
2319 …SET_BIT(HRTIMx->sCommonRegs.CR2, (((Timers >> HRTIM_MCR_MCEN_Pos) << HRTIM_CR2_MRST_Pos) & HRTIM_C… in LL_HRTIM_CounterReset()
2347 SET_BIT(HRTIMx->sCommonRegs.CR2, (uint32_t)(HRTIM_CR2_SWPA) << iTimer); in LL_HRTIM_EnableSwapOutputs()
2375 CLEAR_BIT(HRTIMx->sCommonRegs.CR2, (HRTIM_CR2_SWPA << iTimer)); in LL_HRTIM_DisableSwapOutputs()
2405 …return (READ_BIT(HRTIMx->sCommonRegs.CR2, (uint32_t)(HRTIM_CR2_SWPA) << iTimer) >> ((HRTIM_CR2_SWP… in LL_HRTIM_IsEnabledSwapOutputs()
2440 SET_BIT(HRTIMx->sCommonRegs.OENR, (Outputs & HRTIM_OENR_OEN_MASK)); in LL_HRTIM_EnableOutput()
2475 SET_BIT(HRTIMx->sCommonRegs.ODISR, (Outputs & HRTIM_OENR_ODIS_MASK)); in LL_HRTIM_DisableOutput()
[all …]
Dstm32g4xx_hal_hrtim.h3752 SET_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPA)); \
3756 SET_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPB)); \
3760 SET_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPC)); \
3764 SET_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPD)); \
3768 SET_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPE)); \
3772 SET_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPF)); \
3796 CLEAR_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPA)); \
3800 CLEAR_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPB)); \
3804 CLEAR_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPC)); \
3808 CLEAR_BIT((__HANDLE__)->Instance->sCommonRegs.CR2 , (HRTIM_CR2_SWPD)); \
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_hrtim.h1552 SET_BIT(HRTIMx->sCommonRegs.CR1, ((Timers >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR1_UDIS_MASK)); in LL_HRTIM_SuspendUpdate()
1576 CLEAR_BIT(HRTIMx->sCommonRegs.CR1, ((Timers >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR1_UDIS_MASK)); in LL_HRTIM_ResumeUpdate()
1600 SET_BIT(HRTIMx->sCommonRegs.CR2, ((Timers >> HRTIM_MCR_MCEN_Pos) & HRTIM_CR2_SWUPD_MASK)); in LL_HRTIM_ForceUpdate()
1623 …SET_BIT(HRTIMx->sCommonRegs.CR2, (((Timers >> HRTIM_MCR_MCEN_Pos) << HRTIM_CR2_MRST_Pos) & HRTIM_C… in LL_HRTIM_CounterReset()
1654 SET_BIT(HRTIMx->sCommonRegs.OENR, (Outputs & HRTIM_OENR_OEN_MASK)); in LL_HRTIM_EnableOutput()
1685 SET_BIT(HRTIMx->sCommonRegs.ODISR, (Outputs & HRTIM_OENR_ODIS_MASK)); in LL_HRTIM_DisableOutput()
1716 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == Output) ? 1UL : 0UL); in LL_HRTIM_IsEnabledOutput()
1747 return ((READ_BIT(HRTIMx->sCommonRegs.OENR, Output) == 0U) ? 1UL : 0UL); in LL_HRTIM_IsDisabledOutput()
1974 __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.ADC1R) + in LL_HRTIM_ConfigADCTrig()
1976 MODIFY_REG(HRTIMx->sCommonRegs.CR1, (HRTIM_CR1_ADC1USRC << shift), (Update << shift)); in LL_HRTIM_ConfigADCTrig()
[all …]
Dstm32h7xx_hal_hrtim.h2791 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == (uint32_t)RESET)\
2798 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == (uint32_t)RESET)\
2805 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == (uint32_t)RESET)\
2812 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == (uint32_t)RESET)\
2819 if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == (uint32_t)RESET)\
2840 #define __HAL_HRTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER…
2841 #define __HAL_HRTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER …
2898 …HAL_HRTIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->sCommonRegs.IER &\
2961 #define __HAL_HRTIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.ICR …
3044 #define __HAL_HRTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->sCommonRegs.ISR…
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f334x8.h511 HRTIM_Common_TypeDef sCommonRegs; member
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g414xx.h978 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32g474xx.h1121 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32g484xx.h1153 HRTIM_Common_TypeDef sCommonRegs; member
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h742xx.h1666 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32h750xx.h1823 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32h753xx.h1823 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32h745xx.h1828 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32h745xg.h1828 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32h743xx.h1753 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32h755xx.h1898 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32h757xx.h1979 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32h747xg.h1909 HRTIM_Common_TypeDef sCommonRegs; member
Dstm32h747xx.h1909 HRTIM_Common_TypeDef sCommonRegs; member