stm32f3xx_hal_hrtim.c - OpenGrok cross reference for /hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/stm32f3xx_hal

Lines Matching refs:sCommonRegs
772     CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN);  in HAL_HRTIM_DLLCalibrationStart()
773     SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL);  in HAL_HRTIM_DLLCalibrationStart()
778     SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN);  in HAL_HRTIM_DLLCalibrationStart()
779     MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate);  in HAL_HRTIM_DLLCalibrationStart()
780     SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL);  in HAL_HRTIM_DLLCalibrationStart()
825     CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN);  in HAL_HRTIM_DLLCalibrationStart_IT()
826     SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL);  in HAL_HRTIM_DLLCalibrationStart_IT()
831     SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN);  in HAL_HRTIM_DLLCalibrationStart_IT()
832     MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate);  in HAL_HRTIM_DLLCalibrationStart_IT()
833     SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL);  in HAL_HRTIM_DLLCalibrationStart_IT()
1546   hhrtim->Instance->sCommonRegs.OENR |= OCChannel;  in HAL_HRTIM_SimpleOCStart()
1596   hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;  in HAL_HRTIM_SimpleOCStop()
1656   hhrtim->Instance->sCommonRegs.OENR |= OCChannel;  in HAL_HRTIM_SimpleOCStart_IT()
1712   hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;  in HAL_HRTIM_SimpleOCStop_IT()
1797   hhrtim->Instance->sCommonRegs.OENR |= OCChannel;  in HAL_HRTIM_SimpleOCStart_DMA()
1886   hhrtim->Instance->sCommonRegs.ODISR |= OCChannel;  in HAL_HRTIM_SimpleOCStop_DMA()
2110   hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;  in HAL_HRTIM_SimplePWMStart()
2160   hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;  in HAL_HRTIM_SimplePWMStop()
2211   hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;  in HAL_HRTIM_SimplePWMStart_IT()
2301   hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;  in HAL_HRTIM_SimplePWMStop_IT()
2414   hhrtim->Instance->sCommonRegs.OENR |= PWMChannel;  in HAL_HRTIM_SimplePWMStart_DMA()
2534   hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel;  in HAL_HRTIM_SimplePWMStop_DMA()
3449   hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;  in HAL_HRTIM_SimpleOnePulseStart()
3499   hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;  in HAL_HRTIM_SimpleOnePulseStop()
3550   hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel;  in HAL_HRTIM_SimpleOnePulseStart_IT()
3640   hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel;  in HAL_HRTIM_SimpleOnePulseStop_IT()
3746   hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;  in HAL_HRTIM_BurstModeConfig()
3765   hhrtim->Instance->sCommonRegs.BMTRGR = pBurstModeCfg->Trigger;  in HAL_HRTIM_BurstModeConfig()
3768   hhrtim->Instance->sCommonRegs.BMCMPR = pBurstModeCfg->IdleDuration;  in HAL_HRTIM_BurstModeConfig()
3771   hhrtim->Instance->sCommonRegs.BMPER = pBurstModeCfg->Period;  in HAL_HRTIM_BurstModeConfig()
3774   hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;  in HAL_HRTIM_BurstModeConfig()
3866 …MODIFY_REG(hhrtim->Instance->sCommonRegs.EECR3, HRTIM_EECR3_EEVSD, (Prescaler & HRTIM_EECR3_EEVSD)…  in HAL_HRTIM_EventPrescalerConfig()
3916   hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1;  in HAL_HRTIM_FaultConfig()
3917   hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;  in HAL_HRTIM_FaultConfig()
3988   hhrtim->Instance->sCommonRegs.FLTINR1 = (hrtim_fltinr1 & (~(HRTIM_FLTINR1_FLTxLCK)));  in HAL_HRTIM_FaultConfig()
3989   hhrtim->Instance->sCommonRegs.FLTINR2 = (hrtim_fltinr2 & (~(HRTIM_FLTINR2_FLTxLCK)));  in HAL_HRTIM_FaultConfig()
3992   SET_BIT(hhrtim->Instance->sCommonRegs.FLTINR1,(hrtim_fltinr1 & HRTIM_FLTINR1_FLTxLCK));  in HAL_HRTIM_FaultConfig()
3993   SET_BIT(hhrtim->Instance->sCommonRegs.FLTINR2,(hrtim_fltinr2 & HRTIM_FLTINR2_FLTxLCK));  in HAL_HRTIM_FaultConfig()
4033 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR2, HRTIM_FLTINR2_FLTSD, (Prescaler & HRTIM_FLTINR2_…  in HAL_HRTIM_FaultPrescalerConfig()
4069 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT1E, (Enable & HRTIM_FLTINR1_FLT…  in HAL_HRTIM_FaultModeCtl()
4073 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT2E, ((Enable << 8U) & HRTIM_FLT…  in HAL_HRTIM_FaultModeCtl()
4077 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT3E, ((Enable << 16U) & HRTIM_FL…  in HAL_HRTIM_FaultModeCtl()
4081 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT4E, ((Enable << 24U) & HRTIM_FL…  in HAL_HRTIM_FaultModeCtl()
4085 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR2, HRTIM_FLTINR2_FLT5E, ((Enable) & HRTIM_FLTINR2_F…  in HAL_HRTIM_FaultModeCtl()
4124   hrtim_cr1 = hhrtim->Instance->sCommonRegs.CR1;  in HAL_HRTIM_ADCTriggerConfig()
4134       hhrtim->Instance->sCommonRegs.ADC1R = pADCTriggerCfg->Trigger;  in HAL_HRTIM_ADCTriggerConfig()
4144       hhrtim->Instance->sCommonRegs.ADC2R = pADCTriggerCfg->Trigger;  in HAL_HRTIM_ADCTriggerConfig()
4154       hhrtim->Instance->sCommonRegs.ADC3R = pADCTriggerCfg->Trigger;  in HAL_HRTIM_ADCTriggerConfig()
4164       hhrtim->Instance->sCommonRegs.ADC4R = pADCTriggerCfg->Trigger;  in HAL_HRTIM_ADCTriggerConfig()
4185   hhrtim->Instance->sCommonRegs.CR1 = hrtim_cr1;  in HAL_HRTIM_ADCTriggerConfig()
4650       hhrtim->Instance->sCommonRegs.BDTAUPR = RegistersToUpdate;  in HAL_HRTIM_BurstDMAConfig()
4656       hhrtim->Instance->sCommonRegs.BDTBUPR = RegistersToUpdate;  in HAL_HRTIM_BurstDMAConfig()
4662       hhrtim->Instance->sCommonRegs.BDTCUPR = RegistersToUpdate;  in HAL_HRTIM_BurstDMAConfig()
4668       hhrtim->Instance->sCommonRegs.BDTDUPR = RegistersToUpdate;  in HAL_HRTIM_BurstDMAConfig()
4674       hhrtim->Instance->sCommonRegs.BDTEUPR = RegistersToUpdate;  in HAL_HRTIM_BurstDMAConfig()
4680       hhrtim->Instance->sCommonRegs.BDMUPR = RegistersToUpdate;  in HAL_HRTIM_BurstDMAConfig()
5204   hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart);  in HAL_HRTIM_WaveformOutputStart()
5244   hhrtim->Instance->sCommonRegs.ODISR |= (OutputsToStop);  in HAL_HRTIM_WaveformOutputStop()
5692   MODIFY_REG(hhrtim->Instance->sCommonRegs.BMCR, HRTIM_BMCR_BME, Enable);  in HAL_HRTIM_BurstModeCtl()
5720   SET_BIT(hhrtim->Instance->sCommonRegs.BMTRGR, HRTIM_BMTRGR_SW);  in HAL_HRTIM_BurstModeSoftwareTrigger()
5837   hhrtim->Instance->sCommonRegs.CR2 |= Timers;  in HAL_HRTIM_SoftwareUpdate()
5879   hhrtim->Instance->sCommonRegs.CR2 = Timers;  in HAL_HRTIM_SoftwareReset()
5964                    (uint32_t)&(hhrtim->Instance->sCommonRegs.BDMADR),  in HAL_HRTIM_BurstDMATransfer()
6009   hhrtim->Instance->sCommonRegs.CR1 &= ~(Timers);  in HAL_HRTIM_UpdateEnable()
6045   hhrtim->Instance->sCommonRegs.CR1 |= (Timers);  in HAL_HRTIM_UpdateDisable()
6333   if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET)  in HAL_HRTIM_WaveformGetOutputState()
6340     if ((hhrtim->Instance->sCommonRegs.ODSR & output_bit) != (uint32_t)RESET)  in HAL_HRTIM_WaveformGetOutputState()
6450   burst_mode_status = (hhrtim->Instance->sCommonRegs.BMCR & HRTIM_BMCR_BMSTAT);  in HAL_HRTIM_GetBurstStatus()
7716   hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;  in HRTIM_MasterWaveform_Config()
7752   hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;  in HRTIM_MasterWaveform_Config()
7779   hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;  in HRTIM_TimingUnitWaveform_Config()
7902   hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;  in HRTIM_TimingUnitWaveform_Config()
8113   hrtim_eecr1 = hhrtim->Instance->sCommonRegs.EECR1;  in HRTIM_EventConfig()
8114   hrtim_eecr2 = hhrtim->Instance->sCommonRegs.EECR2;  in HRTIM_EventConfig()
8115   hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3;  in HRTIM_EventConfig()
8122       hhrtim->Instance->sCommonRegs.EECR1 = 0U;  in HRTIM_EventConfig()
8123       hhrtim->Instance->sCommonRegs.EECR2 = 0U;  in HRTIM_EventConfig()
8124       hhrtim->Instance->sCommonRegs.EECR3 = 0U;  in HRTIM_EventConfig()
8135       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8138       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8149       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8152       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8163       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8166       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8177       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8180       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8191       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8194       hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;  in HRTIM_EventConfig()
8207       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;  in HRTIM_EventConfig()
8208       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;  in HRTIM_EventConfig()
8221       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;  in HRTIM_EventConfig()
8222       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;  in HRTIM_EventConfig()
8235       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;  in HRTIM_EventConfig()
8236       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;  in HRTIM_EventConfig()
8249       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;  in HRTIM_EventConfig()
8250       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;  in HRTIM_EventConfig()
8263       hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;  in HRTIM_EventConfig()
8264       hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;  in HRTIM_EventConfig()
8663       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_MSWU;  in HRTIM_ForceRegistersUpdate()
8669       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TASWU;  in HRTIM_ForceRegistersUpdate()
8675       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TBSWU;  in HRTIM_ForceRegistersUpdate()
8681       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TCSWU;  in HRTIM_ForceRegistersUpdate()
8687       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TDSWU;  in HRTIM_ForceRegistersUpdate()
8693       hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TESWU;  in HRTIM_ForceRegistersUpdate()
8710   uint32_t isrflags = READ_REG(hhrtim->Instance->sCommonRegs.ISR);  in HRTIM_HRTIM_ISR()
8711   uint32_t ierits   = READ_REG(hhrtim->Instance->sCommonRegs.IER);  in HRTIM_HRTIM_ISR()
8817   uint32_t isrflags  = READ_REG(hhrtim->Instance->sCommonRegs.ISR);  in HRTIM_Master_ISR()
8818   uint32_t ierits    = READ_REG(hhrtim->Instance->sCommonRegs.IER);  in HRTIM_Master_ISR()