Lines Matching refs:sCommonRegs
786 CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart()
787 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart()
792 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart()
793 MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate); in HAL_HRTIM_DLLCalibrationStart()
794 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart()
839 CLEAR_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart_IT()
840 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart_IT()
845 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALEN); in HAL_HRTIM_DLLCalibrationStart_IT()
846 MODIFY_REG(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CALRTE, CalibrationRate); in HAL_HRTIM_DLLCalibrationStart_IT()
847 SET_BIT(hhrtim->Instance->sCommonRegs.DLLCR, HRTIM_DLLCR_CAL); in HAL_HRTIM_DLLCalibrationStart_IT()
1575 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart()
1628 hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; in HAL_HRTIM_SimpleOCStop()
1691 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_IT()
1750 hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; in HAL_HRTIM_SimpleOCStop_IT()
1838 hhrtim->Instance->sCommonRegs.OENR |= OCChannel; in HAL_HRTIM_SimpleOCStart_DMA()
1930 hhrtim->Instance->sCommonRegs.ODISR |= OCChannel; in HAL_HRTIM_SimpleOCStop_DMA()
2162 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart()
2215 hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; in HAL_HRTIM_SimplePWMStop()
2269 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_IT()
2364 hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; in HAL_HRTIM_SimplePWMStop_IT()
2482 hhrtim->Instance->sCommonRegs.OENR |= PWMChannel; in HAL_HRTIM_SimplePWMStart_DMA()
2607 hhrtim->Instance->sCommonRegs.ODISR |= PWMChannel; in HAL_HRTIM_SimplePWMStop_DMA()
3539 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart()
3592 hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStop()
3646 hhrtim->Instance->sCommonRegs.OENR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStart_IT()
3741 hhrtim->Instance->sCommonRegs.ODISR |= OnePulseChannel; in HAL_HRTIM_SimpleOnePulseStop_IT()
3849 hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR; in HAL_HRTIM_BurstModeConfig()
3868 hhrtim->Instance->sCommonRegs.BMTRGR = pBurstModeCfg->Trigger; in HAL_HRTIM_BurstModeConfig()
3871 hhrtim->Instance->sCommonRegs.BMCMPR = pBurstModeCfg->IdleDuration; in HAL_HRTIM_BurstModeConfig()
3874 hhrtim->Instance->sCommonRegs.BMPER = pBurstModeCfg->Period; in HAL_HRTIM_BurstModeConfig()
3877 hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr; in HAL_HRTIM_BurstModeConfig()
3969 …MODIFY_REG(hhrtim->Instance->sCommonRegs.EECR3, HRTIM_EECR3_EEVSD, (Prescaler & HRTIM_EECR3_EEVSD)… in HAL_HRTIM_EventPrescalerConfig()
4021 hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1; in HAL_HRTIM_FaultConfig()
4022 hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2; in HAL_HRTIM_FaultConfig()
4118 hhrtim->Instance->sCommonRegs.FLTINR1 = (hrtim_fltinr1 & (~(HRTIM_FLTINR1_FLTxLCK))); in HAL_HRTIM_FaultConfig()
4119 hhrtim->Instance->sCommonRegs.FLTINR2 = (hrtim_fltinr2 & (~(HRTIM_FLTINR2_FLTxLCK))); in HAL_HRTIM_FaultConfig()
4122 SET_BIT(hhrtim->Instance->sCommonRegs.FLTINR1, (hrtim_fltinr1 & HRTIM_FLTINR1_FLTxLCK)); in HAL_HRTIM_FaultConfig()
4123 SET_BIT(hhrtim->Instance->sCommonRegs.FLTINR2, (hrtim_fltinr2 & HRTIM_FLTINR2_FLTxLCK)); in HAL_HRTIM_FaultConfig()
4163 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR2, HRTIM_FLTINR2_FLTSD, (Prescaler & HRTIM_FLTINR2_… in HAL_HRTIM_FaultPrescalerConfig()
4211 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, in HAL_HRTIM_FaultBlankingConfigAndEnable()
4219 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, in HAL_HRTIM_FaultBlankingConfigAndEnable()
4227 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, in HAL_HRTIM_FaultBlankingConfigAndEnable()
4235 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, in HAL_HRTIM_FaultBlankingConfigAndEnable()
4243 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR4, in HAL_HRTIM_FaultBlankingConfigAndEnable()
4251 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR4, in HAL_HRTIM_FaultBlankingConfigAndEnable()
4323 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, in HAL_HRTIM_FaultCounterConfig()
4331 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, in HAL_HRTIM_FaultCounterConfig()
4339 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, in HAL_HRTIM_FaultCounterConfig()
4347 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, in HAL_HRTIM_FaultCounterConfig()
4355 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR4, in HAL_HRTIM_FaultCounterConfig()
4363 MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR4, in HAL_HRTIM_FaultCounterConfig()
4427 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, HRTIM_FLTINR3_FLT1CRES, HRTIM_FLTINR3_FLT1CRES) ; in HAL_HRTIM_FaultCounterReset()
4432 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, HRTIM_FLTINR3_FLT2CRES, HRTIM_FLTINR3_FLT2CRES) ; in HAL_HRTIM_FaultCounterReset()
4437 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, HRTIM_FLTINR3_FLT3CRES, HRTIM_FLTINR3_FLT3CRES) ; in HAL_HRTIM_FaultCounterReset()
4442 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR3, HRTIM_FLTINR3_FLT4CRES, HRTIM_FLTINR3_FLT4CRES) ; in HAL_HRTIM_FaultCounterReset()
4447 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR4, HRTIM_FLTINR4_FLT5CRES, HRTIM_FLTINR4_FLT5CRES) ; in HAL_HRTIM_FaultCounterReset()
4452 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR4, HRTIM_FLTINR4_FLT6CRES, HRTIM_FLTINR4_FLT6CRES) ; in HAL_HRTIM_FaultCounterReset()
4507 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT1E, (Enable & HRTIM_FLTINR1_FLT… in HAL_HRTIM_FaultModeCtl()
4511 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT2E, ((Enable << 8U) & HRTIM_FLT… in HAL_HRTIM_FaultModeCtl()
4515 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT3E, ((Enable << 16U) & HRTIM_FL… in HAL_HRTIM_FaultModeCtl()
4519 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR1, HRTIM_FLTINR1_FLT4E, ((Enable << 24U) & HRTIM_FL… in HAL_HRTIM_FaultModeCtl()
4523 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR2, HRTIM_FLTINR2_FLT5E, ((Enable) & HRTIM_FLTINR2_F… in HAL_HRTIM_FaultModeCtl()
4527 …MODIFY_REG(hhrtim->Instance->sCommonRegs.FLTINR2, HRTIM_FLTINR2_FLT6E, ((Enable << 8U) & HRTIM_FLT… in HAL_HRTIM_FaultModeCtl()
4581 hrtim_cr1 = hhrtim->Instance->sCommonRegs.CR1; in HAL_HRTIM_ADCTriggerConfig()
4582 hrtim_adcur = hhrtim->Instance->sCommonRegs.ADCUR; in HAL_HRTIM_ADCTriggerConfig()
4592 hhrtim->Instance->sCommonRegs.ADC1R = pADCTriggerCfg->Trigger; in HAL_HRTIM_ADCTriggerConfig()
4602 hhrtim->Instance->sCommonRegs.ADC2R = pADCTriggerCfg->Trigger; in HAL_HRTIM_ADCTriggerConfig()
4612 hhrtim->Instance->sCommonRegs.ADC3R = pADCTriggerCfg->Trigger; in HAL_HRTIM_ADCTriggerConfig()
4622 hhrtim->Instance->sCommonRegs.ADC4R = pADCTriggerCfg->Trigger; in HAL_HRTIM_ADCTriggerConfig()
4632 hhrtim->Instance->sCommonRegs.ADCER &= ~(HRTIM_ADCER_AD5TRG); in HAL_HRTIM_ADCTriggerConfig()
4633 …hhrtim->Instance->sCommonRegs.ADCER |= ((pADCTriggerCfg->Trigger << HRTIM_ADCER_AD5TRG_Pos) & HRTI… in HAL_HRTIM_ADCTriggerConfig()
4643 hhrtim->Instance->sCommonRegs.ADCER &= ~(HRTIM_ADCER_AD6TRG); in HAL_HRTIM_ADCTriggerConfig()
4644 …hhrtim->Instance->sCommonRegs.ADCER |= ((pADCTriggerCfg->Trigger << HRTIM_ADCER_AD6TRG_Pos) & HRTI… in HAL_HRTIM_ADCTriggerConfig()
4654 hhrtim->Instance->sCommonRegs.ADCER &= ~(HRTIM_ADCER_AD7TRG); in HAL_HRTIM_ADCTriggerConfig()
4655 …hhrtim->Instance->sCommonRegs.ADCER |= ((pADCTriggerCfg->Trigger << HRTIM_ADCER_AD7TRG_Pos) & HRTI… in HAL_HRTIM_ADCTriggerConfig()
4665 hhrtim->Instance->sCommonRegs.ADCER &= ~(HRTIM_ADCER_AD8TRG); in HAL_HRTIM_ADCTriggerConfig()
4666 …hhrtim->Instance->sCommonRegs.ADCER |= ((pADCTriggerCfg->Trigger << HRTIM_ADCER_AD8TRG_Pos) & HRTI… in HAL_HRTIM_ADCTriggerConfig()
4676 hhrtim->Instance->sCommonRegs.ADCER &= ~(HRTIM_ADCER_AD9TRG); in HAL_HRTIM_ADCTriggerConfig()
4677 …hhrtim->Instance->sCommonRegs.ADCER |= ((pADCTriggerCfg->Trigger << HRTIM_ADCER_AD9TRG_Pos) & HRTI… in HAL_HRTIM_ADCTriggerConfig()
4687 hhrtim->Instance->sCommonRegs.ADCER &= ~(HRTIM_ADCER_AD10TRG); in HAL_HRTIM_ADCTriggerConfig()
4688 …hhrtim->Instance->sCommonRegs.ADCER |= ((pADCTriggerCfg->Trigger << HRTIM_ADCER_AD10TRG_Pos) & HRT… in HAL_HRTIM_ADCTriggerConfig()
4711 hhrtim->Instance->sCommonRegs.CR1 = hrtim_cr1; in HAL_HRTIM_ADCTriggerConfig()
4715 hhrtim->Instance->sCommonRegs.ADCUR = hrtim_adcur; in HAL_HRTIM_ADCTriggerConfig()
4767 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS1, HRTIM_ADCPS1_AD1PSC, (Postscaler & HRTIM_ADCPS1_A… in HAL_HRTIM_ADCPostScalerConfig()
4773 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS1, HRTIM_ADCPS1_AD2PSC, ((Postscaler << HRTIM_ADCPS1… in HAL_HRTIM_ADCPostScalerConfig()
4779 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS1, HRTIM_ADCPS1_AD3PSC, ((Postscaler << HRTIM_ADCPS1… in HAL_HRTIM_ADCPostScalerConfig()
4785 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS1, HRTIM_ADCPS1_AD4PSC, ((Postscaler << HRTIM_ADCPS1… in HAL_HRTIM_ADCPostScalerConfig()
4791 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS1, HRTIM_ADCPS1_AD5PSC, ((Postscaler << HRTIM_ADCPS1… in HAL_HRTIM_ADCPostScalerConfig()
4797 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS2, HRTIM_ADCPS2_AD6PSC, ((Postscaler << HRTIM_ADCPS2… in HAL_HRTIM_ADCPostScalerConfig()
4803 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS2, HRTIM_ADCPS2_AD7PSC, ((Postscaler << HRTIM_ADCPS2… in HAL_HRTIM_ADCPostScalerConfig()
4809 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS2, HRTIM_ADCPS2_AD8PSC, ((Postscaler << HRTIM_ADCPS2… in HAL_HRTIM_ADCPostScalerConfig()
4815 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS2, HRTIM_ADCPS2_AD9PSC, ((Postscaler << HRTIM_ADCPS2… in HAL_HRTIM_ADCPostScalerConfig()
4821 …MODIFY_REG(hhrtim->Instance->sCommonRegs.ADCPS2, HRTIM_ADCPS2_AD10PSC, ((Postscaler << HRTIM_ADCPS… in HAL_HRTIM_ADCPostScalerConfig()
5741 hhrtim->Instance->sCommonRegs.BDTAUPR = RegistersToUpdate; in HAL_HRTIM_BurstDMAConfig()
5747 hhrtim->Instance->sCommonRegs.BDTBUPR = RegistersToUpdate; in HAL_HRTIM_BurstDMAConfig()
5753 hhrtim->Instance->sCommonRegs.BDTCUPR = RegistersToUpdate; in HAL_HRTIM_BurstDMAConfig()
5759 hhrtim->Instance->sCommonRegs.BDTDUPR = RegistersToUpdate; in HAL_HRTIM_BurstDMAConfig()
5765 hhrtim->Instance->sCommonRegs.BDTEUPR = RegistersToUpdate; in HAL_HRTIM_BurstDMAConfig()
5771 hhrtim->Instance->sCommonRegs.BDTFUPR = RegistersToUpdate; in HAL_HRTIM_BurstDMAConfig()
5777 hhrtim->Instance->sCommonRegs.BDMUPR = RegistersToUpdate; in HAL_HRTIM_BurstDMAConfig()
6333 hhrtim->Instance->sCommonRegs.OENR |= (OutputsToStart); in HAL_HRTIM_WaveformOutputStart()
6375 hhrtim->Instance->sCommonRegs.ODISR |= (OutputsToStop); in HAL_HRTIM_WaveformOutputStop()
6830 MODIFY_REG(hhrtim->Instance->sCommonRegs.BMCR, HRTIM_BMCR_BME, Enable); in HAL_HRTIM_BurstModeCtl()
6858 SET_BIT(hhrtim->Instance->sCommonRegs.BMTRGR, HRTIM_BMTRGR_SW); in HAL_HRTIM_BurstModeSoftwareTrigger()
6977 hhrtim->Instance->sCommonRegs.CR2 |= Timers; in HAL_HRTIM_SoftwareUpdate()
7018 hhrtim->Instance->sCommonRegs.CR2 |= Timers; in HAL_HRTIM_SwapTimerOutput()
7061 hhrtim->Instance->sCommonRegs.CR2 = Timers; in HAL_HRTIM_SoftwareReset()
7101 hhrtim->Instance->sCommonRegs.CR2 |= Timers; in HAL_HRTIM_OutputSwapEnable()
7141 hhrtim->Instance->sCommonRegs.CR2 &= ~(Timers); in HAL_HRTIM_OutputSwapDisable()
7228 (uint32_t) &(hhrtim->Instance->sCommonRegs.BDMADR), in HAL_HRTIM_BurstDMATransfer()
7274 hhrtim->Instance->sCommonRegs.CR1 &= ~(Timers); in HAL_HRTIM_UpdateEnable()
7311 hhrtim->Instance->sCommonRegs.CR1 |= (Timers); in HAL_HRTIM_UpdateDisable()
7717 if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != (uint32_t)RESET) in HAL_HRTIM_WaveformGetOutputState()
7724 if ((hhrtim->Instance->sCommonRegs.ODSR & output_bit) != (uint32_t)RESET) in HAL_HRTIM_WaveformGetOutputState()
7839 burst_mode_status = (hhrtim->Instance->sCommonRegs.BMCR & HRTIM_BMCR_BMSTAT); in HAL_HRTIM_GetBurstStatus()
9148 hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR; in HRTIM_MasterWaveform_Config()
9209 hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr; in HRTIM_MasterWaveform_Config()
9236 hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR; in HRTIM_TimingUnitWaveform_Config()
9389 hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr; in HRTIM_TimingUnitWaveform_Config()
9683 hrtim_eecr1 = hhrtim->Instance->sCommonRegs.EECR1; in HRTIM_EventConfig()
9684 hrtim_eecr2 = hhrtim->Instance->sCommonRegs.EECR2; in HRTIM_EventConfig()
9685 hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3; in HRTIM_EventConfig()
9692 hhrtim->Instance->sCommonRegs.EECR1 = 0U; in HRTIM_EventConfig()
9693 hhrtim->Instance->sCommonRegs.EECR2 = 0U; in HRTIM_EventConfig()
9694 hhrtim->Instance->sCommonRegs.EECR3 = 0U; in HRTIM_EventConfig()
9705 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9708 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9719 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9722 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9733 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9736 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9747 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9750 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9761 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9764 hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1; in HRTIM_EventConfig()
9777 hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; in HRTIM_EventConfig()
9778 hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; in HRTIM_EventConfig()
9791 hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; in HRTIM_EventConfig()
9792 hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; in HRTIM_EventConfig()
9805 hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; in HRTIM_EventConfig()
9806 hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; in HRTIM_EventConfig()
9819 hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; in HRTIM_EventConfig()
9820 hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; in HRTIM_EventConfig()
9833 hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2; in HRTIM_EventConfig()
9834 hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3; in HRTIM_EventConfig()
10251 hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_MSWU; in HRTIM_ForceRegistersUpdate()
10257 hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TASWU; in HRTIM_ForceRegistersUpdate()
10263 hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TBSWU; in HRTIM_ForceRegistersUpdate()
10269 hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TCSWU; in HRTIM_ForceRegistersUpdate()
10275 hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TDSWU; in HRTIM_ForceRegistersUpdate()
10281 hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TESWU; in HRTIM_ForceRegistersUpdate()
10287 hhrtim->Instance->sCommonRegs.CR2 |= HRTIM_CR2_TFSWU; in HRTIM_ForceRegistersUpdate()
10304 uint32_t isrflags = READ_REG(hhrtim->Instance->sCommonRegs.ISR); in HRTIM_HRTIM_ISR()
10305 uint32_t ierits = READ_REG(hhrtim->Instance->sCommonRegs.IER); in HRTIM_HRTIM_ISR()
10427 uint32_t isrflags = READ_REG(hhrtim->Instance->sCommonRegs.ISR); in HRTIM_Master_ISR()
10428 uint32_t ierits = READ_REG(hhrtim->Instance->sCommonRegs.IER); in HRTIM_Master_ISR()