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Searched refs:TSC_IOCCR_G7_IO3_Pos (Results 1 – 25 of 76) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5847 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
5848 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f051x8.h5878 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
5879 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f071xb.h6431 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
6432 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f042x6.h9653 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
9654 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f048xx.h9617 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
9618 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f072xb.h10228 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
10229 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f091xc.h10885 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
10886 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f098xx.h10852 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
10853 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f078xx.h10198 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
10199 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6404 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
6405 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32l062xx.h6541 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
6542 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32l053xx.h6563 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
6564 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32l072xx.h6700 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
6701 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32l073xx.h6859 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
6860 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32l083xx.h6996 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
6997 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32l063xx.h6698 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
6699 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32l082xx.h6837 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
6838 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7665 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
7666 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f318xx.h7652 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
7653 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32f378xx.h10741 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
10742 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8863 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
8864 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32u083xx.h9800 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
9801 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8294 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
8295 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8122 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
8123 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */
Dstm32wb15xx.h8294 #define TSC_IOCCR_G7_IO3_Pos (26U) macro
8295 #define TSC_IOCCR_G7_IO3_Msk (0x1UL << TSC_IOCCR_G7_IO3_Pos) /*!< 0x04000000 */

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