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Searched refs:TSC_IOCCR_G7_IO1_Pos (Results 1 – 25 of 76) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5841 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
5842 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f051x8.h5872 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
5873 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f071xb.h6425 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
6426 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f042x6.h9647 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
9648 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f048xx.h9611 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
9612 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f072xb.h10222 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
10223 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f091xc.h10879 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
10880 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f098xx.h10846 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
10847 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f078xx.h10192 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
10193 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6398 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
6399 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32l062xx.h6535 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
6536 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32l053xx.h6557 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
6558 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32l072xx.h6694 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
6695 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32l073xx.h6853 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
6854 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32l083xx.h6990 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
6991 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32l063xx.h6692 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
6693 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32l082xx.h6831 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
6832 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7659 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
7660 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f318xx.h7646 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
7647 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32f378xx.h10735 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
10736 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8857 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
8858 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32u083xx.h9794 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
9795 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8288 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
8289 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8116 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
8117 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */
Dstm32wb15xx.h8288 #define TSC_IOCCR_G7_IO1_Pos (24U) macro
8289 #define TSC_IOCCR_G7_IO1_Msk (0x1UL << TSC_IOCCR_G7_IO1_Pos) /*!< 0x01000000 */

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