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Searched refs:TSC_IOASCR_G8_IO4_Pos (Results 1 – 25 of 58) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5666 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
5667 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f051x8.h5697 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
5698 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f071xb.h6250 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
6251 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f042x6.h9472 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
9473 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f048xx.h9436 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
9437 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f072xb.h10047 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
10048 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f091xc.h10704 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
10705 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f098xx.h10671 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
10672 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f078xx.h10017 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
10018 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6223 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
6224 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32l062xx.h6360 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
6361 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32l053xx.h6382 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
6383 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32l072xx.h6519 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
6520 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32l073xx.h6678 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
6679 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32l083xx.h6815 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
6816 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32l063xx.h6517 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
6518 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32l082xx.h6656 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
6657 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7484 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
7485 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f318xx.h7471 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
7472 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f378xx.h10560 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
10561 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f373xc.h10662 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
10663 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f302x8.h11115 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
11116 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f328xx.h10947 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
10948 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f302xc.h11397 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
11398 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */
Dstm32f303x8.h10977 #define TSC_IOASCR_G8_IO4_Pos (31U) macro
10978 #define TSC_IOASCR_G8_IO4_Msk (0x1UL << TSC_IOASCR_G8_IO4_Pos) /*!< 0x80000000 */

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