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Searched refs:FGPFCCR (Results 1 – 25 of 86) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma2d.h1072 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1083 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
1106 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); in LL_DMA2D_FGND_SetColorMode()
1128 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); in LL_DMA2D_FGND_GetColorMode()
1143 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); in LL_DMA2D_FGND_SetAlphaMode()
1157 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); in LL_DMA2D_FGND_GetAlphaMode()
1169 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1180 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
1194 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); in LL_DMA2D_FGND_SetRBSwapMode()
1207 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); in LL_DMA2D_FGND_GetRBSwapMode()
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma2d.h1072 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1083 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
1106 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); in LL_DMA2D_FGND_SetColorMode()
1128 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); in LL_DMA2D_FGND_GetColorMode()
1143 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); in LL_DMA2D_FGND_SetAlphaMode()
1157 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); in LL_DMA2D_FGND_GetAlphaMode()
1169 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1180 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
1194 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); in LL_DMA2D_FGND_SetRBSwapMode()
1207 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); in LL_DMA2D_FGND_GetRBSwapMode()
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma2d.h1072 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1083 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
1106 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); in LL_DMA2D_FGND_SetColorMode()
1128 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); in LL_DMA2D_FGND_GetColorMode()
1143 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); in LL_DMA2D_FGND_SetAlphaMode()
1157 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); in LL_DMA2D_FGND_GetAlphaMode()
1169 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1180 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
1194 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); in LL_DMA2D_FGND_SetRBSwapMode()
1207 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); in LL_DMA2D_FGND_GetRBSwapMode()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma2d.h1078 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1089 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
1112 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); in LL_DMA2D_FGND_SetColorMode()
1134 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); in LL_DMA2D_FGND_GetColorMode()
1149 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); in LL_DMA2D_FGND_SetAlphaMode()
1163 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); in LL_DMA2D_FGND_GetAlphaMode()
1175 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1186 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
1200 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); in LL_DMA2D_FGND_SetRBSwapMode()
1213 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); in LL_DMA2D_FGND_GetRBSwapMode()
[all …]
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma2d.h981 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
992 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
1015 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); in LL_DMA2D_FGND_SetColorMode()
1037 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); in LL_DMA2D_FGND_GetColorMode()
1052 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); in LL_DMA2D_FGND_SetAlphaMode()
1066 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); in LL_DMA2D_FGND_GetAlphaMode()
1078 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1089 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
1104 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); in LL_DMA2D_FGND_SetRBSwapMode()
1117 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); in LL_DMA2D_FGND_GetRBSwapMode()
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma2d.h1085 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1096 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
1119 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); in LL_DMA2D_FGND_SetColorMode()
1141 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); in LL_DMA2D_FGND_GetColorMode()
1156 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); in LL_DMA2D_FGND_SetAlphaMode()
1170 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); in LL_DMA2D_FGND_GetAlphaMode()
1182 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
1193 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
1207 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); in LL_DMA2D_FGND_SetRBSwapMode()
1220 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); in LL_DMA2D_FGND_GetRBSwapMode()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_dma2d.c342 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
359 hdma2d->Instance->FGPFCCR = 0U; in HAL_DMA2D_DeInit()
957 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1007 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad()
1011 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1065 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad_IT()
1072 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1125 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad()
1129 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1185 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad_IT()
[all …]
Dstm32f4xx_ll_dma2d.c299 MODIFY_REG(DMA2Dx->FGPFCCR, \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_dma2d.c351 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
368 hdma2d->Instance->FGPFCCR = 0U; in HAL_DMA2D_DeInit()
999 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1050 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad()
1054 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1108 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad_IT()
1115 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1168 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad()
1172 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1228 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad_IT()
[all …]
Dstm32n6xx_ll_dma2d.c333 MODIFY_REG(DMA2Dx->FGPFCCR, \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_dma2d.c351 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
368 hdma2d->Instance->FGPFCCR = 0U; in HAL_DMA2D_DeInit()
999 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1050 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad()
1054 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1108 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad_IT()
1115 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1168 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad()
1172 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1228 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad_IT()
[all …]
Dstm32h7rsxx_ll_dma2d.c333 MODIFY_REG(DMA2Dx->FGPFCCR, \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_dma2d.c352 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
369 hdma2d->Instance->FGPFCCR = 0U; in HAL_DMA2D_DeInit()
967 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1017 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad()
1021 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1075 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad_IT()
1082 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1135 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad()
1139 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1195 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad_IT()
[all …]
Dstm32f7xx_ll_dma2d.c336 MODIFY_REG(DMA2Dx->FGPFCCR, \ in LL_DMA2D_ConfigLayer()
345 MODIFY_REG(DMA2Dx->FGPFCCR, \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_dma2d.c351 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
368 hdma2d->Instance->FGPFCCR = 0U; in HAL_DMA2D_DeInit()
999 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1050 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad()
1054 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1108 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad_IT()
1115 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1168 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad()
1172 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1228 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad_IT()
[all …]
Dstm32h7xx_ll_dma2d.c333 MODIFY_REG(DMA2Dx->FGPFCCR, \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_dma2d.c351 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
368 hdma2d->Instance->FGPFCCR = 0U; in HAL_DMA2D_DeInit()
999 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1050 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad()
1054 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1108 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad_IT()
1115 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1168 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad()
1172 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1228 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad_IT()
[all …]
Dstm32u5xx_ll_dma2d.c338 MODIFY_REG(DMA2Dx->FGPFCCR, \ in LL_DMA2D_ConfigLayer()
348 MODIFY_REG(DMA2Dx->FGPFCCR, \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_dma2d.c363 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
380 hdma2d->Instance->FGPFCCR = 0U; in HAL_DMA2D_DeInit()
1029 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1080 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad()
1084 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1138 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTStartLoad_IT()
1145 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1198 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad()
1202 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1258 MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM), in HAL_DMA2D_CLUTLoad_IT()
[all …]
Dstm32l4xx_ll_dma2d.c354 MODIFY_REG(DMA2Dx->FGPFCCR, \ in LL_DMA2D_ConfigLayer()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma2d.h877 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
888 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
911 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); in LL_DMA2D_FGND_SetColorMode()
933 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); in LL_DMA2D_FGND_GetColorMode()
948 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); in LL_DMA2D_FGND_SetAlphaMode()
962 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); in LL_DMA2D_FGND_GetAlphaMode()
974 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); in LL_DMA2D_FGND_SetAlpha()
985 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); in LL_DMA2D_FGND_GetAlpha()
1130 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos)); in LL_DMA2D_FGND_SetCLUTSize()
1141 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos); in LL_DMA2D_FGND_GetCLUTSize()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h381 …__IO uint32_t FGPFCCR; /*!< DMA2D Foreground PFC Control Register, Address offset: … member
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f750xx.h404 …__IO uint32_t FGPFCCR; /*!< DMA2D Foreground PFC Control Register, Address offset: … member
Dstm32f745xx.h401 …__IO uint32_t FGPFCCR; /*!< DMA2D Foreground PFC Control Register, Address offset: … member
Dstm32f756xx.h404 …__IO uint32_t FGPFCCR; /*!< DMA2D Foreground PFC Control Register, Address offset: … member

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