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Searched refs:MODE (Results 1 – 25 of 278) sorted by relevance

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/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_ospi.h839 #define IS_OSPI_DUALQUAD_MODE(MODE) (((MODE) == HAL_OSPI_DUALQUAD_DISABLE) || \ argument
840 ((MODE) == HAL_OSPI_DUALQUAD_ENABLE))
855 #define IS_OSPI_CLOCK_MODE(MODE) (((MODE) == HAL_OSPI_CLOCK_MODE_0) || \ argument
856 ((MODE) == HAL_OSPI_CLOCK_MODE_3))
880 #define IS_OSPI_INSTRUCTION_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_NONE) || \ argument
881 ((MODE) == HAL_OSPI_INSTRUCTION_1_LINE) || \
882 ((MODE) == HAL_OSPI_INSTRUCTION_2_LINES) || \
883 ((MODE) == HAL_OSPI_INSTRUCTION_4_LINES) || \
884 ((MODE) == HAL_OSPI_INSTRUCTION_8_LINES))
891 #define IS_OSPI_INSTRUCTION_DTR_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_DTR_DISABLE) || \ argument
[all …]
/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_ospi.h895 #define IS_OSPI_DUALQUAD_MODE(MODE) (((MODE) == HAL_OSPI_DUALQUAD_DISABLE) || \ argument
896 ((MODE) == HAL_OSPI_DUALQUAD_ENABLE))
911 #define IS_OSPI_CLOCK_MODE(MODE) (((MODE) == HAL_OSPI_CLOCK_MODE_0) || \ argument
912 ((MODE) == HAL_OSPI_CLOCK_MODE_3))
936 #define IS_OSPI_INSTRUCTION_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_NONE) || \ argument
937 ((MODE) == HAL_OSPI_INSTRUCTION_1_LINE) || \
938 ((MODE) == HAL_OSPI_INSTRUCTION_2_LINES) || \
939 ((MODE) == HAL_OSPI_INSTRUCTION_4_LINES) || \
940 ((MODE) == HAL_OSPI_INSTRUCTION_8_LINES))
947 #define IS_OSPI_INSTRUCTION_DTR_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_DTR_DISABLE) || \ argument
[all …]
Dstm32h7xx_hal_spi.h963 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ argument
964 ((MODE) == SPI_MODE_MASTER))
966 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ argument
967 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
968 ((MODE) == SPI_DIRECTION_1LINE) || \
969 ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
971 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) argument
973 #define IS_SPI_DIRECTION_2LINES_OR_1LINE_2LINES_TXONLY(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \ argument
974 ((MODE) == SPI_DIRECTION_1LINE) || \
975 … ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
[all …]
Dstm32h7xx_hal_qspi.h665 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \ argument
666 ((MODE) == QSPI_DUALFLASH_DISABLE))
682 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \ argument
683 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
684 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
685 ((MODE) == QSPI_INSTRUCTION_4_LINES))
687 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \ argument
688 ((MODE) == QSPI_ADDRESS_1_LINE) || \
689 ((MODE) == QSPI_ADDRESS_2_LINES) || \
690 ((MODE) == QSPI_ADDRESS_4_LINES))
[all …]
/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_ospi.h915 #define IS_OSPI_DUALQUAD_MODE(MODE) (((MODE) == HAL_OSPI_DUALQUAD_DISABLE) || \ argument
916 ((MODE) == HAL_OSPI_DUALQUAD_ENABLE))
931 #define IS_OSPI_CLOCK_MODE(MODE) (((MODE) == HAL_OSPI_CLOCK_MODE_0) || \ argument
932 ((MODE) == HAL_OSPI_CLOCK_MODE_3))
956 #define IS_OSPI_INSTRUCTION_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_NONE) || \ argument
957 ((MODE) == HAL_OSPI_INSTRUCTION_1_LINE) || \
958 ((MODE) == HAL_OSPI_INSTRUCTION_2_LINES) || \
959 ((MODE) == HAL_OSPI_INSTRUCTION_4_LINES) || \
960 ((MODE) == HAL_OSPI_INSTRUCTION_8_LINES))
967 #define IS_OSPI_INSTRUCTION_DTR_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_DTR_DISABLE) || \ argument
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Dstm32u5xx_hal_xspi.h1094 #define IS_XSPI_MEMORY_MODE(MODE) (((MODE) == HAL_XSPI_SINGLE_MEM) || \ argument
1095 ((MODE) == HAL_XSPI_DUAL_MEM))
1142 #define IS_XSPI_CLOCK_MODE(MODE) (((MODE) == HAL_XSPI_CLOCK_MODE_0) || \ argument
1143 ((MODE) == HAL_XSPI_CLOCK_MODE_3))
1218 #define IS_XSPI_INSTRUCTION_MODE(MODE) (((MODE) == HAL_XSPI_INSTRUCTION_NONE) || \ argument
1219 ((MODE) == HAL_XSPI_INSTRUCTION_1_LINE) || \
1220 ((MODE) == HAL_XSPI_INSTRUCTION_2_LINES) || \
1221 ((MODE) == HAL_XSPI_INSTRUCTION_4_LINES) || \
1222 ((MODE) == HAL_XSPI_INSTRUCTION_8_LINES))
1229 #define IS_XSPI_INSTRUCTION_DTR_MODE(MODE) (((MODE) == HAL_XSPI_INSTRUCTION_DTR_DISABLE) || \ argument
[all …]
Dstm32u5xx_hal_spi.h936 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ argument
937 ((MODE) == SPI_MODE_MASTER))
939 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ argument
940 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
941 ((MODE) == SPI_DIRECTION_1LINE) || \
942 ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
944 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) argument
946 #define IS_SPI_DIRECTION_2LINES_OR_1LINE_2LINES_TXONLY(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \ argument
947 ((MODE) == SPI_DIRECTION_1LINE) || \
948 … ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
[all …]
Dstm32u5xx_hal_dma_ex.h669 #define IS_DMA_LINK_STEP_MODE(MODE) \ argument
670 (((MODE) == DMA_LSM_FULL_EXECUTION) || \
671 ((MODE) == DMA_LSM_1LINK_EXECUTION))
673 #define IS_DMA_TRIGGER_MODE(MODE) \ argument
674 (((MODE) == DMA_TRIGM_BLOCK_TRANSFER) || \
675 ((MODE) == DMA_TRIGM_REPEATED_BLOCK_TRANSFER) || \
676 ((MODE) == DMA_TRIGM_LLI_LINK_TRANSFER) || \
677 ((MODE) == DMA_TRIGM_SINGLE_BURST_TRANSFER))
679 #define IS_DMA_TCEM_LINKEDLIST_EVENT_MODE(MODE) \ argument
680 (((MODE) == DMA_TCEM_BLOCK_TRANSFER) || \
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_ospi.h876 #define IS_OSPI_DUALQUAD_MODE(MODE) (((MODE) == HAL_OSPI_DUALQUAD_DISABLE) || \ argument
877 ((MODE) == HAL_OSPI_DUALQUAD_ENABLE))
899 #define IS_OSPI_CLOCK_MODE(MODE) (((MODE) == HAL_OSPI_CLOCK_MODE_0) || \ argument
900 ((MODE) == HAL_OSPI_CLOCK_MODE_3))
917 #define IS_OSPI_INSTRUCTION_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_NONE) || \ argument
918 ((MODE) == HAL_OSPI_INSTRUCTION_1_LINE) || \
919 ((MODE) == HAL_OSPI_INSTRUCTION_2_LINES) || \
920 ((MODE) == HAL_OSPI_INSTRUCTION_4_LINES) || \
921 ((MODE) == HAL_OSPI_INSTRUCTION_8_LINES))
928 #define IS_OSPI_INSTRUCTION_DTR_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_DTR_DISABLE) || \ argument
[all …]
Dstm32l4xx_hal_qspi.h681 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \ argument
682 ((MODE) == QSPI_DUALFLASH_DISABLE))
699 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \ argument
700 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
701 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
702 ((MODE) == QSPI_INSTRUCTION_4_LINES))
704 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \ argument
705 ((MODE) == QSPI_ADDRESS_1_LINE) || \
706 ((MODE) == QSPI_ADDRESS_2_LINES) || \
707 ((MODE) == QSPI_ADDRESS_4_LINES))
[all …]
/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_xspi.h949 #define IS_XSPI_MEMORY_MODE(MODE) (((MODE) == HAL_XSPI_SINGLE_MEM) || \ argument
950 ((MODE) == HAL_XSPI_DUAL_MEM))
997 #define IS_XSPI_CLOCK_MODE(MODE) (((MODE) == HAL_XSPI_CLOCK_MODE_0) || \ argument
998 ((MODE) == HAL_XSPI_CLOCK_MODE_3))
1063 #define IS_XSPI_INSTRUCTION_MODE(MODE) (((MODE) == HAL_XSPI_INSTRUCTION_NONE) || \ argument
1064 ((MODE) == HAL_XSPI_INSTRUCTION_1_LINE) || \
1065 ((MODE) == HAL_XSPI_INSTRUCTION_2_LINES) || \
1066 ((MODE) == HAL_XSPI_INSTRUCTION_4_LINES) || \
1067 ((MODE) == HAL_XSPI_INSTRUCTION_8_LINES))
1074 #define IS_XSPI_INSTRUCTION_DTR_MODE(MODE) (((MODE) == HAL_XSPI_INSTRUCTION_DTR_DISABLE) || \ argument
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Dstm32h5xx_hal_spi.h936 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ argument
937 ((MODE) == SPI_MODE_MASTER))
939 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ argument
940 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
941 ((MODE) == SPI_DIRECTION_1LINE) || \
942 ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
944 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) argument
946 #define IS_SPI_DIRECTION_2LINES_OR_1LINE_2LINES_TXONLY(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \ argument
947 ((MODE) == SPI_DIRECTION_1LINE) || \
948 … ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
[all …]
/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_spi.h963 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ argument
964 ((MODE) == SPI_MODE_MASTER))
966 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ argument
967 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
968 ((MODE) == SPI_DIRECTION_1LINE) || \
969 ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
971 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) argument
973 #define IS_SPI_DIRECTION_2LINES_OR_1LINE_2LINES_TXONLY(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \ argument
974 ((MODE) == SPI_DIRECTION_1LINE) || \
975 … ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
[all …]
Dstm32mp1xx_hal_qspi.h672 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \ argument
673 ((MODE) == QSPI_DUALFLASH_DISABLE))
689 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \ argument
690 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
691 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
692 ((MODE) == QSPI_INSTRUCTION_4_LINES))
694 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \ argument
695 ((MODE) == QSPI_ADDRESS_1_LINE) || \
696 ((MODE) == QSPI_ADDRESS_2_LINES) || \
697 ((MODE) == QSPI_ADDRESS_4_LINES))
[all …]
Dstm32mp1xx_hal_gpio.h316 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ argument
317 ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
318 ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
319 ((MODE) == GPIO_MODE_AF_PP) ||\
320 ((MODE) == GPIO_MODE_AF_OD) ||\
321 ((MODE) == GPIO_MODE_IT_RISING) ||\
322 ((MODE) == GPIO_MODE_IT_FALLING) ||\
323 ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
324 ((MODE) == GPIO_MODE_EVT_RISING) ||\
325 ((MODE) == GPIO_MODE_EVT_FALLING) ||\
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_qspi.h671 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \ argument
672 ((MODE) == QSPI_DUALFLASH_DISABLE))
688 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \ argument
689 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
690 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
691 ((MODE) == QSPI_INSTRUCTION_4_LINES))
693 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \ argument
694 ((MODE) == QSPI_ADDRESS_1_LINE) || \
695 ((MODE) == QSPI_ADDRESS_2_LINES) || \
696 ((MODE) == QSPI_ADDRESS_4_LINES))
[all …]
/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_qspi.h671 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \ argument
672 ((MODE) == QSPI_DUALFLASH_DISABLE))
688 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \ argument
689 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
690 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
691 ((MODE) == QSPI_INSTRUCTION_4_LINES))
693 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \ argument
694 ((MODE) == QSPI_ADDRESS_1_LINE) || \
695 ((MODE) == QSPI_ADDRESS_2_LINES) || \
696 ((MODE) == QSPI_ADDRESS_4_LINES))
[all …]
Dstm32f4xx_hal_adc_ex.h319 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ argument
320 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
321 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
322 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
323 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
324 ((MODE) == ADC_DUALMODE_INTERL) || \
325 ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
326 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
327 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
328 ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
[all …]
/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_qspi.h671 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \ argument
672 ((MODE) == QSPI_DUALFLASH_DISABLE))
688 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \ argument
689 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
690 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
691 ((MODE) == QSPI_INSTRUCTION_4_LINES))
693 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \ argument
694 ((MODE) == QSPI_ADDRESS_1_LINE) || \
695 ((MODE) == QSPI_ADDRESS_2_LINES) || \
696 ((MODE) == QSPI_ADDRESS_4_LINES))
[all …]
/hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_adc_ex.h281 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ argument
282 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
283 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
284 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
285 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
286 ((MODE) == ADC_DUALMODE_INTERL) || \
287 ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
288 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
289 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
290 ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
[all …]
/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_qspi.h647 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \ argument
648 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
649 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
650 ((MODE) == QSPI_INSTRUCTION_4_LINES))
652 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \ argument
653 ((MODE) == QSPI_ADDRESS_1_LINE) || \
654 ((MODE) == QSPI_ADDRESS_2_LINES) || \
655 ((MODE) == QSPI_ADDRESS_4_LINES))
657 #define IS_QSPI_ALTERNATE_BYTES_MODE(MODE) (((MODE) == QSPI_ALTERNATE_BYTES_NONE) || \ argument
658 ((MODE) == QSPI_ALTERNATE_BYTES_1_LINE) || \
[all …]
/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_spi.h936 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ argument
937 ((MODE) == SPI_MODE_MASTER))
939 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ argument
940 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
941 ((MODE) == SPI_DIRECTION_1LINE) || \
942 ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
944 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) argument
946 #define IS_SPI_DIRECTION_2LINES_OR_1LINE_2LINES_TXONLY(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \ argument
947 ((MODE) == SPI_DIRECTION_1LINE) || \
948 … ((MODE) == SPI_DIRECTION_2LINES_TXONLY))
[all …]
/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_dma2d.c58 #define IS_LL_DMA2D_MODE(MODE) (((MODE) == LL_DMA2D_MODE_M2M) || \ argument
59 ((MODE) == LL_DMA2D_MODE_M2M_PFC) || \
60 ((MODE) == LL_DMA2D_MODE_M2M_BLEND) || \
61 ((MODE) == LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG) || \
62 ((MODE) == LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG) || \
63 ((MODE) == LL_DMA2D_MODE_R2M))
65 #define IS_LL_DMA2D_MODE(MODE) (((MODE) == LL_DMA2D_MODE_M2M) || \ argument
66 ((MODE) == LL_DMA2D_MODE_M2M_PFC) || \
67 ((MODE) == LL_DMA2D_MODE_M2M_BLEND) || \
68 ((MODE) == LL_DMA2D_MODE_R2M))
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_pwr_ex.h529 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) || \ argument
530 ((MODE) == PWR_PVD_MODE_IT_RISING) || \
531 ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
532 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || \
533 ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
534 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || \
535 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING))
541 #define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\ argument
542 ((MODE) == PWR_PVM_MODE_IT_RISING) ||\
543 ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\
[all …]
/hal_stm32-3.5.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_gpio.h265 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ argument
266 ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
267 ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
268 ((MODE) == GPIO_MODE_AF_PP) ||\
269 ((MODE) == GPIO_MODE_AF_OD) ||\
270 ((MODE) == GPIO_MODE_IT_RISING) ||\
271 ((MODE) == GPIO_MODE_IT_FALLING) ||\
272 ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
273 ((MODE) == GPIO_MODE_EVT_RISING) ||\
274 ((MODE) == GPIO_MODE_EVT_FALLING) ||\
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