1 /** 2 ****************************************************************************** 3 * @file stm32g0xx_hal_pwr_ex.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2018 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G0xx_HAL_PWR_EX_H 21 #define STM32G0xx_HAL_PWR_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g0xx_hal_def.h" 29 30 /** @addtogroup STM32G0xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @defgroup PWREx PWREx 35 * @brief PWR Extended HAL module driver 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup PWREx_Exported_Types PWR Extended Exported Types 41 * @{ 42 */ 43 44 #if defined(PWR_PVM_SUPPORT) 45 /** 46 * @brief PWR PVM configuration structure definition 47 */ 48 typedef struct 49 { 50 uint32_t PVMType; /*!< PVMType: Specifies which voltage is monitored and against which threshold. 51 This parameter can be a value of @ref PWREx_PVM_Type. 52 @arg @ref PWR_PVM_USB Peripheral Voltage Monitoring USB enable */ 53 54 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 55 This parameter can be a value of @ref PWREx_PVM_Mode. */ 56 } PWR_PVMTypeDef; 57 #endif /* PWR_PVM_SUPPORT */ 58 59 #if defined(PWR_PVD_SUPPORT) 60 /** 61 * @brief PWR PVD configuration structure definition 62 */ 63 typedef struct 64 { 65 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 66 This parameter can be a value or a combination of 67 @ref PWR_PVD_detection_level. */ 68 69 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 70 This parameter can be a value of @ref PWR_PVD_Mode. */ 71 } PWR_PVDTypeDef; 72 #endif /* PWR_PVD_SUPPORT */ 73 74 /** 75 * @} 76 */ 77 /* Exported constants --------------------------------------------------------*/ 78 /** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants 79 * @{ 80 */ 81 #if defined(PWR_PVD_SUPPORT) 82 /** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels 83 * @note see datasheet for selection voltage value 84 * @{ 85 */ 86 #define PWR_PVDLEVEL_RISING_0 (0x00000000u) /*!< PVD threshold level 0 for rising detection */ 87 #define PWR_PVDLEVEL_RISING_1 (PWR_CR2_PVDRT_0) /*!< PVD threshold level 1 for rising detection */ 88 #define PWR_PVDLEVEL_RISING_2 (PWR_CR2_PVDRT_1) /*!< PVD threshold level 2 for rising detection */ 89 #define PWR_PVDLEVEL_RISING_3 (PWR_CR2_PVDRT_0 | PWR_CR2_PVDRT_1) /*!< PVD threshold level 3 for rising detection */ 90 #define PWR_PVDLEVEL_RISING_4 (PWR_CR2_PVDRT_2) /*!< PVD threshold level 4 for rising detection */ 91 #define PWR_PVDLEVEL_RISING_5 (PWR_CR2_PVDRT_2 | PWR_CR2_PVDRT_0) /*!< PVD threshold level 5 for rising detection */ 92 #define PWR_PVDLEVEL_RISING_6 (PWR_CR2_PVDRT_2 | PWR_CR2_PVDRT_1) /*!< PVD threshold level 6 for rising detection */ 93 #define PWR_PVDLEVEL_FALLING_0 (0x00000000u) /*!< PVD threshold level 0 for falling detection */ 94 #define PWR_PVDLEVEL_FALLING_1 (PWR_CR2_PVDFT_0) /*!< PVD threshold level 1 for falling detection */ 95 #define PWR_PVDLEVEL_FALLING_2 (PWR_CR2_PVDFT_1) /*!< PVD threshold level 2 for falling detection */ 96 #define PWR_PVDLEVEL_FALLING_3 (PWR_CR2_PVDFT_0 | PWR_CR2_PVDFT_1) /*!< PVD threshold level 3 for falling detection */ 97 #define PWR_PVDLEVEL_FALLING_4 (PWR_CR2_PVDFT_2) /*!< PVD threshold level 4 for falling detection */ 98 #define PWR_PVDLEVEL_FALLING_5 (PWR_CR2_PVDFT_2 | PWR_CR2_PVDFT_0) /*!< PVD threshold level 5 for falling detection */ 99 #define PWR_PVDLEVEL_FALLING_6 (PWR_CR2_PVDFT_2 | PWR_CR2_PVDFT_1) /*!< PVD threshold level 6 for falling detection */ 100 #define PWR_PVDLEVEL_0 (PWR_PVDLEVEL_RISING_0 | PWR_PVDLEVEL_FALLING_0) /*!< same PVD threshold level 0 on rising & falling */ 101 #define PWR_PVDLEVEL_1 (PWR_PVDLEVEL_RISING_1 | PWR_PVDLEVEL_FALLING_1) /*!< same PVD threshold level 1 on rising & falling */ 102 #define PWR_PVDLEVEL_2 (PWR_PVDLEVEL_RISING_2 | PWR_PVDLEVEL_FALLING_2) /*!< same PVD threshold level 2 on rising & falling */ 103 #define PWR_PVDLEVEL_3 (PWR_PVDLEVEL_RISING_3 | PWR_PVDLEVEL_FALLING_3) /*!< same PVD threshold level 3 on rising & falling */ 104 #define PWR_PVDLEVEL_4 (PWR_PVDLEVEL_RISING_4 | PWR_PVDLEVEL_FALLING_4) /*!< same PVD threshold level 4 on rising & falling */ 105 #define PWR_PVDLEVEL_5 (PWR_PVDLEVEL_RISING_5 | PWR_PVDLEVEL_FALLING_5) /*!< same PVD threshold level 5 on rising & falling */ 106 #define PWR_PVDLEVEL_6 (PWR_PVDLEVEL_RISING_6 | PWR_PVDLEVEL_FALLING_6) /*!< same PVD threshold level 6 on rising & falling */ 107 #define PWR_PVDLEVEL_7 (PWR_CR2_PVDRT_2 | PWR_CR2_PVDRT_1 | PWR_CR2_PVDRT_0) /*!< External input analog voltage (compared internally to VREFINT) */ 108 /** 109 * @} 110 */ 111 112 /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode 113 * @{ 114 */ 115 #define PWR_PVD_MODE_NORMAL (0x00000000u) /*!< basic mode is used */ 116 #define PWR_PVD_MODE_IT_RISING (0x00010001u) /*!< External Interrupt Mode with Rising edge trigger detection */ 117 #define PWR_PVD_MODE_IT_FALLING (0x00010002u) /*!< External Interrupt Mode with Falling edge trigger detection */ 118 #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003u) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 119 #define PWR_PVD_MODE_EVENT_RISING (0x00020001u) /*!< Event Mode with Rising edge trigger detection */ 120 #define PWR_PVD_MODE_EVENT_FALLING (0x00020002u) /*!< Event Mode with Falling edge trigger detection */ 121 #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003u) /*!< Event Mode with Rising/Falling edge trigger detection */ 122 /** 123 * @} 124 */ 125 126 /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line 127 * @{ 128 */ 129 #define PWR_EXTI_LINE_PVD (EXTI_IMR1_IM16) /*!< External interrupt line 16 connected to PVD */ 130 /** 131 * @} 132 */ 133 134 /** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line 135 * @{ 136 */ 137 #define PWR_EVENT_LINE_PVD (EXTI_EMR1_EM16) /*!< Event line 16 connected to PVD */ 138 /** 139 * @} 140 */ 141 #endif /* PWR_PVD_SUPPORT */ 142 143 #if defined(PWR_PVM_SUPPORT) 144 /** @defgroup PWREx_PVM_Type Peripheral Voltage Monitoring type 145 * @{ 146 */ 147 #define PWR_PVM_USB PWR_CR2_PVMEN_USB /*!< Peripheral Voltage Monitoring enable for USB peripheral: Enable to keep the USB peripheral voltage monitoring under control (power domain Vddio2) */ 148 /** 149 * @} 150 */ 151 /** @defgroup PWREx_PVM_Mode PWR PVM interrupt and event mode 152 * @{ 153 */ 154 #define PWR_PVM_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ 155 #define PWR_PVM_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ 156 #define PWR_PVM_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ 157 #define PWR_PVM_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 158 #define PWR_PVM_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ 159 #define PWR_PVM_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ 160 #define PWR_PVM_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ 161 /** 162 * @} 163 */ 164 /** @defgroup PWR_PVM_EXTI_LINE PWR PVM external interrupt line 165 * @{ 166 */ 167 #define PWR_EXTI_LINE_PVM (EXTI_IMR2_IM34) /*!< External interrupt line 34 connected to PVM */ 168 /** 169 * @} 170 */ 171 172 /** @defgroup PWR_PVM_EVENT_LINE PWR PVM event line 173 * @{ 174 */ 175 #define PWR_EVENT_LINE_PVM (EXTI_EMR2_EM34) /*!< Event line 34 connected to PVM */ 176 /** 177 * @} 178 */ 179 #endif /* PWR_PVM_SUPPORT */ 180 181 /** @defgroup PWREx_VBAT_Battery_Charging_Selection PWR battery charging resistor selection 182 * @{ 183 */ 184 #define PWR_BATTERY_CHARGING_RESISTOR_5 (0x00000000u) /*!< VBAT charging through a 5 kOhms resistor */ 185 #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_CR4_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */ 186 /** 187 * @} 188 */ 189 190 /** @defgroup PWREx_GPIO_Bit_Number GPIO bit position 191 * @brief for I/O pull up/down setting in standby/shutdown mode 192 * @{ 193 */ 194 #define PWR_GPIO_BIT_0 PWR_PUCRB_PU0 /*!< GPIO port I/O pin 0 */ 195 #define PWR_GPIO_BIT_1 PWR_PUCRB_PU1 /*!< GPIO port I/O pin 1 */ 196 #define PWR_GPIO_BIT_2 PWR_PUCRB_PU2 /*!< GPIO port I/O pin 2 */ 197 #define PWR_GPIO_BIT_3 PWR_PUCRB_PU3 /*!< GPIO port I/O pin 3 */ 198 #define PWR_GPIO_BIT_4 PWR_PUCRB_PU4 /*!< GPIO port I/O pin 4 */ 199 #define PWR_GPIO_BIT_5 PWR_PUCRB_PU5 /*!< GPIO port I/O pin 5 */ 200 #define PWR_GPIO_BIT_6 PWR_PUCRB_PU6 /*!< GPIO port I/O pin 6 */ 201 #define PWR_GPIO_BIT_7 PWR_PUCRB_PU7 /*!< GPIO port I/O pin 7 */ 202 #define PWR_GPIO_BIT_8 PWR_PUCRB_PU8 /*!< GPIO port I/O pin 8 */ 203 #define PWR_GPIO_BIT_9 PWR_PUCRB_PU9 /*!< GPIO port I/O pin 9 */ 204 #define PWR_GPIO_BIT_10 PWR_PUCRB_PU10 /*!< GPIO port I/O pin 10 */ 205 #define PWR_GPIO_BIT_11 PWR_PUCRB_PU11 /*!< GPIO port I/O pin 11 */ 206 #define PWR_GPIO_BIT_12 PWR_PUCRB_PU12 /*!< GPIO port I/O pin 12 */ 207 #define PWR_GPIO_BIT_13 PWR_PUCRB_PU13 /*!< GPIO port I/O pin 13 */ 208 #define PWR_GPIO_BIT_14 PWR_PUCRB_PU14 /*!< GPIO port I/O pin 14 */ 209 #define PWR_GPIO_BIT_15 PWR_PUCRB_PU15 /*!< GPIO port I/O pin 15 */ 210 /** 211 * @} 212 */ 213 214 /** @defgroup PWREx_GPIO_Port GPIO Port 215 * @{ 216 */ 217 #define PWR_GPIO_A (0x00000000u) /*!< GPIO port A */ 218 #define PWR_GPIO_B (0x00000001u) /*!< GPIO port B */ 219 #define PWR_GPIO_C (0x00000002u) /*!< GPIO port C */ 220 #define PWR_GPIO_D (0x00000003u) /*!< GPIO port D */ 221 #if defined (GPIOE) 222 #define PWR_GPIO_E (0x00000004u) /*!< GPIO port E */ 223 #endif /* GPIOE */ 224 #define PWR_GPIO_F (0x00000005u) /*!< GPIO port F */ 225 /** 226 * @} 227 */ 228 229 /** @defgroup PWREx_Flash_PowerDown Flash Power Down modes 230 * @{ 231 */ 232 #define PWR_FLASHPD_LPRUN PWR_CR1_FPD_LPRUN /*!< Enable Flash power down in low power run mode */ 233 #define PWR_FLASHPD_LPSLEEP PWR_CR1_FPD_LPSLP /*!< Enable Flash power down in low power sleep mode */ 234 #define PWR_FLASHPD_STOP PWR_CR1_FPD_STOP /*!< Enable Flash power down in stop mode */ 235 /** 236 * @} 237 */ 238 239 /** @defgroup PWREx_Regulator_Voltage_Scale PWR Regulator voltage scale 240 * @{ 241 */ 242 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS_0 /*!< Voltage scaling range 1 */ 243 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 /*!< Voltage scaling range 2 */ 244 /** 245 * @} 246 */ 247 248 /** @addtogroup PWR_Flag PWR Status Flags 249 * @brief Elements values convention: 0000 00XX 000Y YYYYb 250 * - Y YYYY : Flag position in the XX register (5 bits) 251 * - XX : Status register (2 bits) 252 * - 01: SR1 register 253 * - 10: SR2 register 254 * The only exception is PWR_FLAG_WU, encompassing all 255 * wake-up flags and set to PWR_SR1_WUF. 256 * @{ 257 */ 258 #if defined(PWR_PVM_SUPPORT) 259 #define PWR_FLAG_PVMOUSB (0x00020000u | PWR_SR2_PVMO_USB) /*!< USB Peripheral Voltage Monitoring output */ 260 #endif /* PWR_PVM_SUPPORT */ 261 /** 262 * @} 263 */ 264 265 /** 266 * @} 267 */ 268 269 /* Exported macros -----------------------------------------------------------*/ 270 /** @addtogroup PWREx_Exported_Macros PWR Extended Exported Macros 271 * @{ 272 */ 273 #if defined(PWR_PVD_SUPPORT) 274 /** 275 * @brief Enable the PVD Extended Interrupt Line. 276 * @retval None 277 */ 278 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 279 280 /** 281 * @brief Disable the PVD Extended Interrupt Line. 282 * @retval None 283 */ 284 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 285 286 /** 287 * @brief Enable the PVD Event Line. 288 * @retval None 289 */ 290 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) 291 292 /** 293 * @brief Disable the PVD Event Line. 294 * @retval None 295 */ 296 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) 297 298 /** 299 * @brief Enable the PVD Extended Interrupt Rising Trigger. 300 * @retval None 301 */ 302 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 303 304 /** 305 * @brief Disable the PVD Extended Interrupt Rising Trigger. 306 * @retval None 307 */ 308 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 309 310 /** 311 * @brief Enable the PVD Extended Interrupt Falling Trigger. 312 * @retval None 313 */ 314 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 315 316 /** 317 * @brief Disable the PVD Extended Interrupt Falling Trigger. 318 * @retval None 319 */ 320 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 321 322 /** 323 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. 324 * @retval None 325 */ 326 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 327 do { \ 328 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 329 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 330 } while(0U) 331 332 /** 333 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 334 * @retval None 335 */ 336 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 337 do { \ 338 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 339 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 340 } while(0U) 341 342 /** 343 * @brief Generate a Software interrupt on selected EXTI line. 344 * @retval None 345 */ 346 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) 347 348 /** 349 * @brief Check whether or not the PVD EXTI interrupt Rising flag is set. 350 * @retval EXTI PVD Line Status. 351 */ 352 #define __HAL_PWR_PVD_EXTI_GET_RISING_FLAG() (EXTI->RPR1 & PWR_EXTI_LINE_PVD) 353 354 /** 355 * @brief Check whether or not the PVD EXTI interrupt Falling flag is set. 356 * @retval EXTI PVD Line Status. 357 */ 358 #define __HAL_PWR_PVD_EXTI_GET_FALLING_FLAG() (EXTI->FPR1 & PWR_EXTI_LINE_PVD) 359 360 /** 361 * @brief Clear the PVD EXTI interrupt Rising flag. 362 * @retval None 363 */ 364 #define __HAL_PWR_PVD_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_PVD) 365 366 /** 367 * @brief Clear the PVD EXTI interrupt Falling flag. 368 * @retval None 369 */ 370 #define __HAL_PWR_PVD_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_PVD) 371 #endif /* PWR_PVD_SUPPORT */ 372 373 #if defined(PWR_PVM_SUPPORT) 374 /** 375 * @brief Enable the PVM Extended Interrupt Line. 376 * @retval None 377 */ 378 #define __HAL_PWR_PVM_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM) 379 380 /** 381 * @brief Disable the PVM Extended Interrupt Line. 382 * @retval None 383 */ 384 #define __HAL_PWR_PVM_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM) 385 386 /** 387 * @brief Enable the PVM Event Line. 388 * @retval None 389 */ 390 #define __HAL_PWR_PVM_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM) 391 392 /** 393 * @brief Disable the PVM Event Line. 394 * @retval None 395 */ 396 #define __HAL_PWR_PVM_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM) 397 398 /** 399 * @brief Enable the PVM Extended Interrupt Rising Trigger. 400 * @retval None 401 */ 402 #define __HAL_PWR_PVM_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM) 403 404 /** 405 * @brief Disable the PVM Extended Interrupt Rising Trigger. 406 * @retval None 407 */ 408 #define __HAL_PWR_PVM_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM) 409 410 /** 411 * @brief Enable the PVM Extended Interrupt Falling Trigger. 412 * @retval None 413 */ 414 #define __HAL_PWR_PVM_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM) 415 416 /** 417 * @brief Disable the PVM Extended Interrupt Falling Trigger. 418 * @retval None 419 */ 420 #define __HAL_PWR_PVM_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM) 421 422 /** 423 * @brief Enable the PVM Extended Interrupt Rising & Falling Trigger. 424 * @retval None 425 */ 426 #define __HAL_PWR_PVM_EXTI_ENABLE_RISING_FALLING_EDGE() \ 427 do { \ 428 __HAL_PWR_PVM_EXTI_ENABLE_RISING_EDGE(); \ 429 __HAL_PWR_PVM_EXTI_ENABLE_FALLING_EDGE(); \ 430 } while(0U) 431 432 /** 433 * @brief Disable the PVM Extended Interrupt Rising & Falling Trigger. 434 * @retval None 435 */ 436 #define __HAL_PWR_PVM_EXTI_DISABLE_RISING_FALLING_EDGE() \ 437 do { \ 438 __HAL_PWR_PVM_EXTI_DISABLE_RISING_EDGE(); \ 439 __HAL_PWR_PVM_EXTI_DISABLE_FALLING_EDGE(); \ 440 } while(0U) 441 442 /** 443 * @brief Generate a Software interrupt on selected EXTI line. 444 * @retval None 445 */ 446 #define __HAL_PWR_PVM_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM) 447 448 /** 449 * @brief Check whether or not the PVM EXTI interrupt Rising flag is set. 450 * @retval EXTI PVM Line Status. 451 */ 452 #define __HAL_PWR_PVM_EXTI_GET_RISING_FLAG() (EXTI->RPR2 & PWR_EXTI_LINE_PVM) 453 454 /** 455 * @brief Check whether or not the PVM EXTI interrupt Falling flag is set. 456 * @retval EXTI PVM Line Status. 457 */ 458 #define __HAL_PWR_PVM_EXTI_GET_FALLING_FLAG() (EXTI->FPR2 & PWR_EXTI_LINE_PVM) 459 460 /** 461 * @brief Clear the PVM EXTI interrupt Rising flag. 462 * @retval None 463 */ 464 #define __HAL_PWR_PVM_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR2, PWR_EXTI_LINE_PVM) 465 466 /** 467 * @brief Clear the PVM EXTI interrupt Falling flag. 468 * @retval None 469 */ 470 #define __HAL_PWR_PVM_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR2, PWR_EXTI_LINE_PVM) 471 #endif /* PWR_PVM_SUPPORT */ 472 /** 473 * @} 474 */ 475 476 /* Private define ------------------------------------------------------------*/ 477 /** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines 478 * @{ 479 */ 480 481 /** @defgroup PWREx_PVM_Mode_Mask PWR PVM Mode Mask 482 * @{ 483 */ 484 #define PVM_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVM threshold crossing */ 485 #define PVM_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVM threshold crossing */ 486 #define PVM_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVM trigger */ 487 #define PVM_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVM trigger */ 488 /** 489 * @} 490 */ 491 492 /** 493 * @} 494 */ 495 /* Private macros ------------------------------------------------------------*/ 496 /** @addtogroup PWREx_Private_Macros PWR Extended Private Macros 497 * @{ 498 */ 499 500 #define IS_PWR_BATTERY_RESISTOR_SELECT(__RESISTOR__) (((__RESISTOR__) == PWR_BATTERY_CHARGING_RESISTOR_5) || \ 501 ((__RESISTOR__) == PWR_BATTERY_CHARGING_RESISTOR_1_5)) 502 503 #define IS_PWR_GPIO_BIT_NUMBER(__BIT_NUMBER__) ((((__BIT_NUMBER__) & 0x0000FFFFu) != 0x00u) && \ 504 (((__BIT_NUMBER__) & 0xFFFF0000u) == 0x00u)) 505 #if defined (GPIOE) 506 #define IS_PWR_GPIO(__GPIO__) (((__GPIO__) == PWR_GPIO_A) || \ 507 ((__GPIO__) == PWR_GPIO_B) || \ 508 ((__GPIO__) == PWR_GPIO_C) || \ 509 ((__GPIO__) == PWR_GPIO_D) || \ 510 ((__GPIO__) == PWR_GPIO_E) || \ 511 ((__GPIO__) == PWR_GPIO_F)) 512 #else 513 #define IS_PWR_GPIO(__GPIO__) (((__GPIO__) == PWR_GPIO_A) || \ 514 ((__GPIO__) == PWR_GPIO_B) || \ 515 ((__GPIO__) == PWR_GPIO_C) || \ 516 ((__GPIO__) == PWR_GPIO_D) || \ 517 ((__GPIO__) == PWR_GPIO_F)) 518 #endif /* GPIOE */ 519 520 #define IS_PWR_FLASH_POWERDOWN(__MODE__) ((((__MODE__) & (PWR_FLASHPD_LPRUN | PWR_FLASHPD_LPSLEEP | PWR_FLASHPD_STOP)) != 0x00u) && \ 521 (((__MODE__) & ~(PWR_FLASHPD_LPRUN | PWR_FLASHPD_LPSLEEP | PWR_FLASHPD_STOP)) == 0x00u)) 522 523 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ 524 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2)) 525 526 #if defined(PWR_PVD_SUPPORT) 527 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) & ~(PWR_CR2_PVDRT | PWR_CR2_PVDFT)) == 0x00000000u) 528 529 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) || \ 530 ((MODE) == PWR_PVD_MODE_IT_RISING) || \ 531 ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 532 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || \ 533 ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 534 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || \ 535 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING)) 536 #endif /* PWR_PVD_SUPPORT */ 537 538 #if defined(PWR_PVM_SUPPORT) 539 #define IS_PWR_PVM_TYPE(TYPE) ((TYPE) == PWR_PVM_USB) 540 541 #define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\ 542 ((MODE) == PWR_PVM_MODE_IT_RISING) ||\ 543 ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\ 544 ((MODE) == PWR_PVM_MODE_IT_RISING_FALLING) ||\ 545 ((MODE) == PWR_PVM_MODE_EVENT_RISING) ||\ 546 ((MODE) == PWR_PVM_MODE_EVENT_FALLING) ||\ 547 ((MODE) == PWR_PVM_MODE_EVENT_RISING_FALLING)) 548 #endif /* PWR_PVM_SUPPORT */ 549 /** 550 * @} 551 */ 552 553 /* Exported functions --------------------------------------------------------*/ 554 /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions 555 * @{ 556 */ 557 558 /** @defgroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions 559 * @{ 560 */ 561 562 /* Peripheral Control functions **********************************************/ 563 void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection); 564 void HAL_PWREx_DisableBatteryCharging(void); 565 #if defined(PWR_CR3_ENB_ULP) 566 void HAL_PWREx_EnablePORMonitorSampling(void); 567 void HAL_PWREx_DisablePORMonitorSampling(void); 568 #endif /* PWR_CR3_ENB_ULP */ 569 void HAL_PWREx_EnableInternalWakeUpLine(void); 570 void HAL_PWREx_DisableInternalWakeUpLine(void); 571 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); 572 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); 573 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); 574 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); 575 void HAL_PWREx_EnablePullUpPullDownConfig(void); 576 void HAL_PWREx_DisablePullUpPullDownConfig(void); 577 #if defined(PWR_CR3_RRS) 578 void HAL_PWREx_EnableSRAMRetention(void); 579 void HAL_PWREx_DisableSRAMRetention(void); 580 #endif /* PWR_CR3_RRS */ 581 void HAL_PWREx_EnableFlashPowerDown(uint32_t PowerMode); 582 void HAL_PWREx_DisableFlashPowerDown(uint32_t PowerMode); 583 uint32_t HAL_PWREx_GetVoltageRange(void); 584 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling); 585 #if defined(PWR_PVD_SUPPORT) 586 /* Power voltage detection configuration functions ****************************/ 587 HAL_StatusTypeDef HAL_PWREx_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 588 void HAL_PWREx_EnablePVD(void); 589 void HAL_PWREx_DisablePVD(void); 590 #endif /* PWR_PVD_SUPPORT */ 591 #if defined(PWR_PVM_SUPPORT) 592 /* Power voltage monitoring configuration functions ***************************/ 593 void HAL_PWREx_EnableVddIO2(void); 594 void HAL_PWREx_DisableVddIO2(void); 595 void HAL_PWREx_EnableVddUSB(void); 596 void HAL_PWREx_DisableVddUSB(void); 597 void HAL_PWREx_EnablePVMUSB(void); 598 void HAL_PWREx_DisablePVMUSB(void); 599 HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM); 600 #endif /* PWR_PVM_SUPPORT */ 601 602 /* Low Power modes configuration functions ************************************/ 603 void HAL_PWREx_EnableLowPowerRunMode(void); 604 HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void); 605 #if defined(PWR_SHDW_SUPPORT) 606 void HAL_PWREx_EnterSHUTDOWNMode(void); 607 #endif /* PWR_SHDW_SUPPORT */ 608 609 #if defined(PWR_PVD_SUPPORT) && defined(PWR_PVM_SUPPORT) 610 void HAL_PWREx_PVD_PVM_IRQHandler(void); 611 void HAL_PWREx_PVD_PVM_Rising_Callback(void); 612 void HAL_PWREx_PVD_PVM_Falling_Callback(void); 613 #elif defined(PWR_PVD_SUPPORT) 614 void HAL_PWREx_PVD_IRQHandler(void); 615 void HAL_PWREx_PVD_Rising_Callback(void); 616 void HAL_PWREx_PVD_Falling_Callback(void); 617 #endif /* PWR_PVD_SUPPORT && PWR_PVM_SUPPORT */ 618 619 /** 620 * @} 621 */ 622 623 /** 624 * @} 625 */ 626 627 /** 628 * @} 629 */ 630 631 /** 632 * @} 633 */ 634 635 #ifdef __cplusplus 636 } 637 #endif 638 639 640 #endif /* STM32G0xx_HAL_PWR_EX_H */ 641
