Home
last modified time | relevance | path

Searched refs:kSCG_SysClkDivBy1 (Results 1 – 25 of 49) sorted by relevance

12

/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l3a6/project_template/
Dclock_config.c79 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */ in CLOCK_CONFIG_FircSafeConfig()
144 .divBus = kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
145 .divExt = kSCG_SysClkDivBy1, /* External Clock Divider: divided by 1 */
146 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
243 .divBus = kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
244 .divExt = kSCG_SysClkDivBy1, /* External Clock Divider: divided by 1 */
245 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
348 .divExt = kSCG_SysClkDivBy1, /* External Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l3a6/
Dclock_config.c79 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */ in CLOCK_CONFIG_FircSafeConfig()
141 .divBus = kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
142 .divExt = kSCG_SysClkDivBy1, /* External Clock Divider: divided by 1 */
143 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
241 .divBus = kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
242 .divExt = kSCG_SysClkDivBy1, /* External Clock Divider: divided by 1 */
243 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
350 .divExt = kSCG_SysClkDivBy1, /* External Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/
Dclock_config.c105 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
106 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
107 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider. */
123 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
141 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
157 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
172 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
173 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
174 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider. */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/project_template/
Dclock_config.c115 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
116 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
117 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider. */
132 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
148 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
163 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
164 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
165 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/project_template/
Dclock_config.c115 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
116 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
117 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider. */
132 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
148 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
163 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
164 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
165 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/project_template/
Dclock_config.c115 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
116 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
117 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider. */
132 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
148 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
163 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
164 .divPlat = kSCG_SysClkDivBy1, /* Platform clock divider. */
165 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/project_template/
Dclock_config.c76 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */ in CLOCK_CONFIG_FircSafeConfig()
126 .divBus = kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
127 .divExt = kSCG_SysClkDivBy1, /* External Clock Divider: divided by 1 */
128 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/project_template/
Dclock_config.c77 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider */ in CLOCK_CONFIG_FircSafeConfig()
78 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
136 .divBus = kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
137 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/project_template/
Dclock_config.c77 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider */ in CLOCK_CONFIG_FircSafeConfig()
78 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
136 .divBus = kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
137 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/project_template/
Dclock_config.c77 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider */ in CLOCK_CONFIG_FircSafeConfig()
78 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
136 .divBus = kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
137 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/frdm-k32w042/
Dclock_config.c71 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */ in CLOCK_CONFIG_FircSafeConfig()
130 .divBus = kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
131 .divExt = kSCG_SysClkDivBy1, /* External Clock Divider: divided by 1 */
132 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/kw45b41z-evk/
Dclock_config.c82 .divCore = (uint32_t)kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
149 .divBus = (uint32_t)kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */
150 .divCore = (uint32_t)kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/
Dclock_config.c77 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider */ in CLOCK_CONFIG_FircSafeConfig()
78 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
273 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
393 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/project_template/
Dclock_config.c78 .divBus = kSCG_SysClkDivBy1, /* Bus clock divider */ in CLOCK_CONFIG_FircSafeConfig()
79 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
279 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
408 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/
Dclock_config.c98 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
182 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
313 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
429 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/project_template/
Dclock_config.c99 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
199 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
310 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
132 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/project_template/
Dclock_config.c76 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/project_template/
Dclock_config.c76 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
132 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/project_template/
Dclock_config.c76 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
132 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/project_template/
Dclock_config.c83 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
150 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */

12