| /hal_nxp-2.7.6/mcux/drivers/lpc/ |
| D | fsl_sysctl.c | 108 void SYSCTL_SetShareSet(SYSCTL_Type *base, uint32_t flexCommIndex, sysctl_fcctrlsel_signal_t signal… in SYSCTL_SetShareSet() argument
112 tempReg &= ~((uint32_t)SYSCTL_FCCTRLSEL_SCKINSEL_MASK << (uint32_t)signal); in SYSCTL_SetShareSet()
113 tempReg |= (set + 1U) << (uint32_t)signal; in SYSCTL_SetShareSet()
187 sysctl_sharedctrlset_signal_t signal, in SYSCTL_SetShareSignalSrc() argument
192 if (signal == kSYSCTL_SharedCtrlSignalDataOut) in SYSCTL_SetShareSignalSrc()
194 tempReg |= 1UL << ((uint32_t)signal + shareSrc); in SYSCTL_SetShareSignalSrc()
198 tempReg &= ~((uint32_t)SYSCTL_SHAREDCTRLSET_SHAREDSCKSEL_MASK << (uint32_t)signal); in SYSCTL_SetShareSignalSrc()
199 tempReg |= shareSrc << (uint32_t)signal; in SYSCTL_SetShareSignalSrc()
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| D | fsl_inputmux.c | 81 void INPUTMUX_EnableSignal(INPUTMUX_Type *base, inputmux_signal_t signal, bool enable) in INPUTMUX_EnableSignal() argument
92 if (enable && ((((uint32_t)signal) & (1UL << CHMUX_AVL_SHIFT)) != 0U)) in INPUTMUX_EnableSignal()
94 …chmux_offset = (((uint32_t)signal) >> CHMUX_OFF_SHIFT) & ((1UL << (CHMUX_AVL_SHIFT - CHMUX_OFF_SHI… in INPUTMUX_EnableSignal()
95 …chmux_value = (((uint32_t)signal) >> CHMUX_VAL_SHIFT) & ((1UL << (CHMUX_OFF_SHIFT - CHMUX_VAL_SHI… in INPUTMUX_EnableSignal()
101 ena_id = (((uint32_t)signal) >> ENA_SHIFT) & ena_id_mask; in INPUTMUX_EnableSignal()
103 bit_offset = ((uint32_t)signal) & ((1UL << ENA_SHIFT) - 1U); in INPUTMUX_EnableSignal()
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| D | fsl_sysctl.h | 144 void SYSCTL_SetShareSet(SYSCTL_Type *base, uint32_t flexCommIndex, sysctl_fcctrlsel_signal_t signal…
175 sysctl_sharedctrlset_signal_t signal,
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| D | fsl_inputmux.h | 77 void INPUTMUX_EnableSignal(INPUTMUX_Type *base, inputmux_signal_t signal, bool enable);
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| /hal_nxp-2.7.6/mcux/drivers/imxrt6xx/ |
| D | fsl_inputmux.c | 81 void INPUTMUX_EnableSignal(INPUTMUX_Type *base, inputmux_signal_t signal, bool enable) in INPUTMUX_EnableSignal() argument
92 if (enable && ((((uint32_t)signal) & (1UL << CHMUX_AVL_SHIFT)) != 0U)) in INPUTMUX_EnableSignal()
94 …chmux_offset = (((uint32_t)signal) >> CHMUX_OFF_SHIFT) & ((1UL << (CHMUX_AVL_SHIFT - CHMUX_OFF_SHI… in INPUTMUX_EnableSignal()
95 …chmux_value = (((uint32_t)signal) >> CHMUX_VAL_SHIFT) & ((1UL << (CHMUX_OFF_SHIFT - CHMUX_VAL_SHI… in INPUTMUX_EnableSignal()
101 ena_id = (((uint32_t)signal) >> ENA_SHIFT) & ena_id_mask; in INPUTMUX_EnableSignal()
103 bit_offset = ((uint32_t)signal) & ((1UL << ENA_SHIFT) - 1U); in INPUTMUX_EnableSignal()
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| D | fsl_inputmux.h | 77 void INPUTMUX_EnableSignal(INPUTMUX_Type *base, inputmux_signal_t signal, bool enable);
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| /hal_nxp-2.7.6/imx/drivers/ |
| D | ccm_imx6sx.c | 43 void CCM_SetClockEnableSignalOverrided(CCM_Type * base, uint32_t signal, bool control) in CCM_SetClockEnableSignalOverrided() argument
46 CCM_CMEOR_REG(base) |= signal; in CCM_SetClockEnableSignalOverrided()
48 CCM_CMEOR_REG(base) &= ~signal; in CCM_SetClockEnableSignalOverrided()
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| D | ccm_imx6sx.h | 772 void CCM_SetClockEnableSignalOverrided(CCM_Type * base, uint32_t signal, bool control);
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| /hal_nxp-2.7.6/dts/nxp/kinetis/ |
| D | MKW40Z160VHT4-pinctrl.dtsi | 14 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKW24D512VHA5-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKW41Z512VHT4-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MK22FN512VLH12-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKL25Z128VLK4-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE14F256VLH16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE14F512VLH16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE16F256VLH16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE16F512VLH16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE18F256VLH16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE18F512VLH16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MK64FN1M0VLL12-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MK64FN1M0VDC12-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE14F256VLL16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE14F512VLL16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE16F256VLL16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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| D | MKE16F512VLL16-pinctrl.dtsi | 11 * <SIGNAL[0..n]>: <signal[0]> {
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