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Searched refs:CPUSS_RAMC2_PRESENT (Results 1 – 19 of 19) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device_common.h423 #define CPUSS_RAMC2_PRESENT 0u macro
Dpsoc6_01_config.h1677 #define CPUSS_RAMC2_PRESENT 0u macro
Dpsoc6_03_config.h1328 #define CPUSS_RAMC2_PRESENT 0u macro
Dpsoc6_04_config.h1290 #define CPUSS_RAMC2_PRESENT 0u macro
Dpsoc6_02_config.h1803 #define CPUSS_RAMC2_PRESENT 1u macro
Dfx3g2_config.h1960 #define CPUSS_RAMC2_PRESENT 0u macro
Dtviibe1m_config.h1779 #define CPUSS_RAMC2_PRESENT 0u macro
Dtviibe2m_config.h1938 #define CPUSS_RAMC2_PRESENT 0u macro
Dtviibe4m_config.h1939 #define CPUSS_RAMC2_PRESENT 0u macro
Dcy_device.h808 #define CPUSS_SRAM_COUNT (1u + CPUSS_RAMC1_PRESENT + CPUSS_RAMC2_PRESENT)
/hal_infineon-latest/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM0P/
Dsystem_cm0plus.c228 #if (CPUSS_RAMC2_PRESENT == 1u) in EnableEcc()
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_syspm.c2111 CY_ASSERT_L1( CPUSS_RAMC2_PRESENT ); in Cy_SysPm_SetSRAMMacroPwrMode()
2192 CY_ASSERT_L1( CPUSS_RAMC2_PRESENT ); in Cy_SysPm_SetSRAMPwrMode()
Dcy_syspm_v3.c1521 CY_ASSERT_L1( CPUSS_RAMC2_PRESENT ); in Cy_SysPm_SetSRAMMacroPwrMode()
1595 CY_ASSERT_L1( CPUSS_RAMC2_PRESENT ); in Cy_SysPm_SetSRAMPwrMode()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829B0_config.h652 #define CPUSS_RAMC2_PRESENT 0u macro
Dcyw20829_config.h652 #define CPUSS_RAMC2_PRESENT 0u macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h2022 #define CPUSS_RAMC2_PRESENT 0u macro
Dtviic2d6m_config.h2174 #define CPUSS_RAMC2_PRESENT 1u macro
Dxmc7200_config.h2607 #define CPUSS_RAMC2_PRESENT 1u macro
Dcy_device.h535 #define CPUSS_SRAM_COUNT (1u + CPUSS_RAMC1_PRESENT + CPUSS_RAMC2_PRESENT)