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Searched refs:ctrl0 (Results 1 – 25 of 49) sorted by relevance

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/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/TMR/
Dtmr_revb.c69 MXC_SETFIELD(tmr->ctrl0, MXC_F_TMR_CTRL0_CLKDIV_A, cfg->pres); in MXC_TMR_RevB_Init()
76 MXC_SETFIELD(tmr->ctrl0, MXC_F_TMR_CTRL0_CLKDIV_B, (cfg->pres) << 12); in MXC_TMR_RevB_Init()
185 tmr->ctrl0 |= (MXC_F_TMR_REVB_CTRL0_CLKEN_A << timerOffset); in MXC_TMR_RevB_ConfigGeneric()
188 tmr->ctrl0 |= (cfg->mode << timerOffset); in MXC_TMR_RevB_ConfigGeneric()
189 tmr->ctrl0 |= ((cfg->pol << MXC_F_TMR_REVB_CTRL0_POL_A_POS) << timerOffset); in MXC_TMR_RevB_ConfigGeneric()
205 tmr->ctrl0 |= MXC_F_TMR_REVB_CTRL0_EN_B; in MXC_TMR_RevB_ConfigGeneric()
219 tmr->ctrl0 = 0; in MXC_TMR_RevB_Shutdown()
230 tmr->ctrl0 |= MXC_F_TMR_REVB_CTRL0_EN_A; in MXC_TMR_RevB_Start()
240 tmr->ctrl0 &= ~MXC_F_TMR_REVB_CTRL0_EN_A; in MXC_TMR_RevB_Stop()
253 bool timera_is_running = tmr->ctrl0 & MXC_F_TMR_CTRL0_EN_A; in MXC_TMR_RevB_SetPWM()
[all …]
Dtmr_revb_regs.h79 __IO uint32_t ctrl0; /**< <tt>\b 0x10:</tt> TMR_REVB CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/SPI/
Dspi_reva1.c81 spi->ctrl0 = (MXC_F_SPI_REVA_CTRL0_EN); in MXC_SPI_RevA1_Init()
88 spi->ctrl0 |= MXC_F_SPI_REVA_CTRL0_MST_MODE; in MXC_SPI_RevA1_Init()
90 spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_MST_MODE); in MXC_SPI_RevA1_Init()
107 spi->ctrl0 |= MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS0; in MXC_SPI_RevA1_Init()
111 spi->ctrl0 |= (MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS0 | MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS1); in MXC_SPI_RevA1_Init()
115 spi->ctrl0 |= (MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS0 | MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS1 | in MXC_SPI_RevA1_Init()
120 spi->ctrl0 |= (MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS0 | MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS1 | in MXC_SPI_RevA1_Init()
143 spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN); in MXC_SPI_RevA1_Shutdown()
158 spi->ctrl0 = 0; in MXC_SPI_RevA1_Shutdown()
258 spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN); in MXC_SPI_RevA1_SetDataSize()
[all …]
Dspi_reva2.c302 spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN); in MXC_SPI_RevA2_process()
303 spi->ctrl0 |= (MXC_F_SPI_REVA_CTRL0_EN); in MXC_SPI_RevA2_process()
365 spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN); in MXC_SPI_RevA2_Init()
366 spi->ctrl0 |= (MXC_F_SPI_REVA_CTRL0_EN); in MXC_SPI_RevA2_Init()
371 spi->ctrl0 |= MXC_F_SPI_REVA_CTRL0_MST_MODE; in MXC_SPI_RevA2_Init()
375 spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_MST_MODE); in MXC_SPI_RevA2_Init()
419 MXC_SETFIELD(spi->ctrl0, MXC_F_SPI_REVA_CTRL0_SS_ACTIVE, 0); in MXC_SPI_RevA2_Init()
482 spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN); in MXC_SPI_RevA2_Shutdown()
486 spi->ctrl0 = 0; in MXC_SPI_RevA2_Shutdown()
545 spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_SS_ACTIVE); in MXC_SPI_RevA2_SetTSControl()
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Dspi_me10.c170 int slvSel = (spi->ctrl0 & MXC_F_SPI_CTRL0_SS_SEL) >> MXC_F_SPI_CTRL0_SS_SEL_POS; in MXC_SPI_GetSlave()
Dspi_reva_regs.h80 __IO uint32_t ctrl0; /**< <tt>\b 0x04:</tt> SPI CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/ADC/
Dadc_revb.c64 adc->ctrl0 &= ~MXC_F_ADC_REVB_CTRL0_RESETB; in MXC_ADC_RevB_Init()
72 adc->ctrl0 |= MXC_F_ADC_REVB_CTRL0_RESETB; in MXC_ADC_RevB_Init()
75 adc->ctrl0 |= MXC_F_ADC_REVB_CTRL0_BIAS_EN; in MXC_ADC_RevB_Init()
79 adc->ctrl0 &= ~MXC_F_ADC_REVB_CTRL0_SKIP_CAL; in MXC_ADC_RevB_Init()
81 adc->ctrl0 |= MXC_F_ADC_REVB_CTRL0_SKIP_CAL; in MXC_ADC_RevB_Init()
89 adc->ctrl0 |= MXC_F_ADC_REVB_CTRL0_ADC_EN; in MXC_ADC_RevB_Init()
114 adc->ctrl0 &= in MXC_ADC_RevB_Shutdown()
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/AFE/
Dafe_timer.c60 tmr->ctrl0 &= ~(MXC_F_TMR_CTRL0_EN_A << timerOffset); in AFE_TMR_Stop_16()
150 tmr->ctrl0 |= (MXC_F_TMR_CTRL0_EN_A << timerOffset); in AFE_TMR_Start_16()
204 tmr->ctrl0 &= ~(0xFFFF << timerOffset); in AFE_TMR_Config_16()
209 tmr->ctrl0 |= (MXC_F_TMR_CTRL0_CLKEN_A << timerOffset); in AFE_TMR_Config_16()
212 tmr->ctrl0 |= (cfg->mode << timerOffset); in AFE_TMR_Config_16()
213 tmr->ctrl0 |= ((cfg->pol << MXC_F_TMR_CTRL0_POL_A_POS) << timerOffset); in AFE_TMR_Config_16()
214 tmr->ctrl0 |= ((cfg->pres << MXC_F_TMR_CTRL0_CLKDIV_A_POS) << timerOffset); in AFE_TMR_Config_16()
Dafe.c350 pSPIm->ctrl0 |= (AFE_SPI_SSEL_PIN << MXC_F_SPI_CTRL0_SS_ACTIVE_POS); in afe_spi_setup()
364 pSPIm->ctrl0 |= (MXC_F_SPI_CTRL0_EN | MXC_F_SPI_CTRL0_MST_MODE); in afe_spi_setup()
478 pSPIm->ctrl0 |= MXC_F_SPI_CTRL0_START; in afe_spi_transceive()
568 pSPIm->ctrl0 |= MXC_F_SPI_CTRL0_START; in afe_spi_transceive()
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/SKBD/
Dskbd_reva.c77 skbd->ctrl0 |= config.outputs; in MXC_SKBD_RevA_Init()
79 skbd->ctrl0 &= ~(config.inputs); in MXC_SKBD_RevA_Init()
Dskbd_reva_regs.h75 __IO uint32_t ctrl0; /**< <tt>\b 0x00:</tt> SKBD_REVA CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/PeriphDrivers/Source/I2C/
Di2c_revb.c219 i2c->ctrl0 |= MXC_F_I2C_REVB_CTRL0_GCEN; in MXC_I2C_RevB_EnableGeneralCall()
224 i2c->ctrl0 &= ~MXC_F_I2C_REVB_CTRL0_GCEN; in MXC_I2C_RevB_DisableGeneralCall()
395 if (i2c->ctrl0 & MXC_F_I2C_REVB_CTRL0_READ) { in MXC_I2C_RevB_SlaveAsyncHandler()
432 if (i2c->ctrl0 & MXC_F_I2C_REVB_CTRL0_MST) { in MXC_I2C_RevB_AsyncHandler()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32572/Include/
Dskbd_regs.h77 __IO uint32_t ctrl0; /**< <tt>\b 0x00:</tt> SKBD CTRL0 Register */ member
Dspixfc_regs.h77 __IO uint32_t ctrl0; /**< <tt>\b 0x00:</tt> SPIXFC CTRL0 Register */ member
/hal_adi-latest/MAX/Include/
Dwrap_max32_uart.h97 uart->ctrl0 |= MXC_F_UART_CTRL0_ENABLE; in Wrap_MXC_UART_Init()
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32660/Include/
Duart_regs.h77 __IO uint32_t ctrl0; /**< <tt>\b 0x00:</tt> UART CTRL0 Register */ member
Dspi_regs.h78 __IO uint32_t ctrl0; /**< <tt>\b 0x04:</tt> SPI CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32690/Include/
Dspixfc_regs.h77 __IO uint32_t ctrl0; /**< <tt>\b 0x00:</tt> SPIXFC CTRL0 Register */ member
Dspixr_regs.h82 __IO uint32_t ctrl0; /**< <tt>\b 0x04:</tt> SPIXR CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32665/Include/
Dspi_regs.h82 __IO uint32_t ctrl0; /**< <tt>\b 0x04:</tt> SPI CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX78002/Include/
Dspi_regs.h82 __IO uint32_t ctrl0; /**< <tt>\b 0x04:</tt> SPI CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32670/Include/
Dspi_regs.h82 __IO uint32_t ctrl0; /**< <tt>\b 0x04:</tt> SPI CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32675/Include/
Dspi_regs.h82 __IO uint32_t ctrl0; /**< <tt>\b 0x04:</tt> SPI CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32672/Include/
Dspi_regs.h82 __IO uint32_t ctrl0; /**< <tt>\b 0x04:</tt> SPI CTRL0 Register */ member
/hal_adi-latest/MAX/Libraries/CMSIS/Device/Maxim/MAX32570/Include/
Dspi_regs.h81 __IO uint32_t ctrl0; /**< <tt>\b 0x04:</tt> SPI CTRL0 Register */ member

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