1 /******************************************************************************
2 *
3 * Copyright (C) 2023-2025 Analog Devices, Inc.
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18
19 #ifndef LIBRARIES_ZEPHYR_MAX_INCLUDE_WRAP_MAX32_UART_H_
20 #define LIBRARIES_ZEPHYR_MAX_INCLUDE_WRAP_MAX32_UART_H_
21
22 /***** Includes *****/
23 #include <uart.h>
24
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28
29 #if defined(CONFIG_SOC_MAX32665) || defined(CONFIG_SOC_MAX32666) || \
30 defined(CONFIG_SOC_MAX32650) || defined(CONFIG_SOC_MAX32660)
31 #if !defined(CONFIG_SOC_MAX32650) && !defined(CONFIG_SOC_MAX32660)
32 // status flags
33 #define ADI_MAX32_UART_RX_EMPTY MXC_F_UART_STATUS_RX_EMPTY
34 #define ADI_MAX32_UART_TX_EMPTY MXC_F_UART_STATUS_TX_EMPTY
35 #define ADI_MAX32_UART_STATUS_TX_FULL MXC_F_UART_STATUS_TX_FULL
36 // error flags
37 #define ADI_MAX32_UART_ERROR_OVERRUN MXC_F_UART_INT_FL_RX_OVERRUN
38 #define ADI_MAX32_UART_ERROR_PARITY MXC_F_UART_INT_FL_RX_PARITY_ERROR
39 #define ADI_MAX32_UART_ERROR_FRAMING MXC_F_UART_INT_FL_RX_FRAME_ERROR
40 #else
41 // status flags
42 #define ADI_MAX32_UART_RX_EMPTY MXC_F_UART_STAT_RX_EMPTY
43 #define ADI_MAX32_UART_TX_EMPTY MXC_F_UART_STAT_TX_EMPTY
44 #define ADI_MAX32_UART_STATUS_TX_FULL MXC_F_UART_STAT_TX_FULL
45 // error flags
46 #define ADI_MAX32_UART_ERROR_OVERRUN MXC_F_UART_INT_FL_RX_OVR
47 #define ADI_MAX32_UART_ERROR_PARITY MXC_F_UART_INT_FL_PARITY
48 #define ADI_MAX32_UART_ERROR_FRAMING MXC_F_UART_INT_FL_FRAME
49 #endif
50 // interrupt flag
51 #define ADI_MAX32_UART_INT_EOT MXC_F_UART_INT_EN_LAST_BREAK // End Of Transmission Interrupt
52 #define ADI_MAX32_UART_INT_OE MXC_F_UART_INT_EN_RX_OVERRUN // Overrun Error Interrupt
53 #define ADI_MAX32_UART_INT_BE MXC_F_UART_INT_EN_BREAK // Break Error Interrupt
54 #define ADI_MAX32_UART_INT_PE MXC_F_UART_INT_EN_RX_PARITY_ERROR // Parity Error Interrupt
55 #define ADI_MAX32_UART_INT_FE MXC_F_UART_INT_EN_RX_FRAME_ERROR // Framing Error Interrupt
56 #if !defined(CONFIG_SOC_MAX32650) && !defined(CONFIG_SOC_MAX32660)
57 #define ADI_MAX32_UART_INT_RT MXC_F_UART_INT_EN_RX_TIMEOUT // Receive Timeout Interrupt
58 #define ADI_MAX32_UART_INT_TX MXC_F_UART_INT_EN_TX_FIFO_THRESH // Transmit Interrupt
59 #define ADI_MAX32_UART_INT_RX MXC_F_UART_INT_EN_RX_FIFO_THRESH // Receive Interrupt
60 #define ADI_MAX32_UART_INT_CTS MXC_F_UART_INT_EN_CTS_CHANGE // CTS Modem Interrupt
61 #define ADI_MAX32_UART_INT_TX_OEM \
62 MXC_F_UART_INT_EN_TX_FIFO_ALMOST_EMPTY // TX FIFO Almost Empty Interrupt
63 #else
64 #define ADI_MAX32_UART_INT_RT MXC_F_UART_INT_EN_RX_TO // Receive Timeout Interrupt
65 #define ADI_MAX32_UART_INT_TX MXC_F_UART_INT_EN_TX_FIFO_LVL // Transmit Interrupt
66 #define ADI_MAX32_UART_INT_RX MXC_F_UART_INT_EN_RX_FIFO_LVL // Receive Interrupt
67 #define ADI_MAX32_UART_INT_CTS MXC_F_UART_INT_EN_CTS // CTS Modem Interrupt
68 #define ADI_MAX32_UART_INT_TX_OEM MXC_F_UART_INT_EN_TX_FIFO_AE // TX FIFO Almost Empty Interrupt
69 #endif
70 // parity
71 #define ADI_MAX32_UART_CFG_PARITY_NONE MXC_UART_PARITY_DISABLE
72 #define ADI_MAX32_UART_CFG_PARITY_ODD MXC_UART_PARITY_ODD
73 #define ADI_MAX32_UART_CFG_PARITY_EVEN MXC_UART_PARITY_EVEN
74 #define ADI_MAX32_UART_CFG_PARITY_MARK MXC_UART_PARITY_MARK
75 #define ADI_MAX32_UART_CFG_PARITY_SPACE MXC_UART_PARITY_SPACE
76
77 /* Error interrupts */
78 #define ADI_MAX32_UART_ERROR_INTERRUPTS \
79 (ADI_MAX32_UART_INT_OE | ADI_MAX32_UART_INT_PE | ADI_MAX32_UART_INT_FE)
80
Wrap_MXC_UART_Init(mxc_uart_regs_t * uart)81 static inline int Wrap_MXC_UART_Init(mxc_uart_regs_t *uart)
82 {
83 int ret;
84
85 ret = MXC_UART_SetRXThreshold(uart, 1);
86 if (ret) {
87 return ret;
88 }
89
90 // default values as per of MSDK
91 ret = MXC_UART_SetTXThreshold(uart, 2);
92 if (ret) {
93 return ret;
94 }
95
96 #if defined(CONFIG_SOC_MAX32650) || defined(CONFIG_SOC_MAX32660)
97 uart->ctrl0 |= MXC_F_UART_CTRL0_ENABLE;
98 #else
99 uart->ctrl |= MXC_F_UART_CTRL_ENABLE;
100 #endif
101
102 return ret;
103 }
104
Wrap_MXC_UART_SetFrequency(mxc_uart_regs_t * uart,unsigned int baud,int clock_source)105 static inline int Wrap_MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud,
106 int clock_source)
107 {
108 (void)clock_source;
109 return MXC_UART_SetFrequency(uart, baud);
110 }
111
Wrap_MXC_UART_SetTxDMALevel(mxc_uart_regs_t * uart,uint8_t bytes)112 static inline void Wrap_MXC_UART_SetTxDMALevel(mxc_uart_regs_t *uart, uint8_t bytes)
113 {
114 uart->dma |= ((bytes & 0x1F) << MXC_F_UART_DMA_TXDMA_LEVEL_POS);
115 }
116
Wrap_MXC_UART_SetRxDMALevel(mxc_uart_regs_t * uart,uint8_t bytes)117 static inline void Wrap_MXC_UART_SetRxDMALevel(mxc_uart_regs_t *uart, uint8_t bytes)
118 {
119 uart->dma |= ((bytes & 0x1F) << MXC_F_UART_DMA_RXDMA_LEVEL_POS);
120 }
121
Wrap_MXC_UART_EnableTxDMA(mxc_uart_regs_t * uart)122 static inline void Wrap_MXC_UART_EnableTxDMA(mxc_uart_regs_t *uart)
123 {
124 uart->dma |= MXC_F_UART_DMA_TXDMA_EN;
125 }
126
Wrap_MXC_UART_EnableRxDMA(mxc_uart_regs_t * uart)127 static inline void Wrap_MXC_UART_EnableRxDMA(mxc_uart_regs_t *uart)
128 {
129 uart->dma |= MXC_F_UART_DMA_RXDMA_EN;
130 }
131
Wrap_MXC_UART_DisableTxDMA(mxc_uart_regs_t * uart)132 static inline void Wrap_MXC_UART_DisableTxDMA(mxc_uart_regs_t *uart)
133 {
134 uart->dma &= ~MXC_F_UART_DMA_TXDMA_EN;
135 }
136
Wrap_MXC_UART_DisableRxDMA(mxc_uart_regs_t * uart)137 static inline void Wrap_MXC_UART_DisableRxDMA(mxc_uart_regs_t *uart)
138 {
139 uart->dma &= ~MXC_F_UART_DMA_RXDMA_EN;
140 }
141
142 /*
143 * MAX32690, MAX32655 related mapping
144 */
145 #elif defined(CONFIG_SOC_MAX32690) || defined(CONFIG_SOC_MAX32655) || \
146 defined(CONFIG_SOC_MAX32670) || defined(CONFIG_SOC_MAX32672) || \
147 defined(CONFIG_SOC_MAX32662) || defined(CONFIG_SOC_MAX32675) || \
148 defined(CONFIG_SOC_MAX32680) || defined(CONFIG_SOC_MAX78002) || \
149 defined(CONFIG_SOC_MAX78000)
150
151 // status flags
152 #define ADI_MAX32_UART_RX_EMPTY MXC_F_UART_STATUS_RX_EM
153 #define ADI_MAX32_UART_TX_EMPTY MXC_F_UART_STATUS_TX_EM
154 #define ADI_MAX32_UART_STATUS_TX_FULL MXC_F_UART_STATUS_TX_FULL
155
156 #if defined(CONFIG_SOC_MAX32662)
157 // error flags
158 #define ADI_MAX32_UART_ERROR_OVERRUN MXC_F_UART_INTFL_RX_OV
159 #define ADI_MAX32_UART_ERROR_PARITY MXC_F_UART_INTFL_RX_PAR
160 #define ADI_MAX32_UART_ERROR_FRAMING MXC_F_UART_INTFL_RX_FERR
161 // interrupt flag
162 #define ADI_MAX32_UART_INT_OE MXC_F_UART_INTEN_RX_OV // Overrun Error Interrupt
163 #define ADI_MAX32_UART_INT_PE MXC_F_UART_INTEN_RX_PAR // Parity Error Interrupt
164 #define ADI_MAX32_UART_INT_FE MXC_F_UART_INTEN_RX_FERR // Framing Error Interrupt
165 #define ADI_MAX32_UART_INT_TX MXC_F_UART_INTEN_TX_HE // Transmit Interrupt
166 #define ADI_MAX32_UART_INT_RX MXC_F_UART_INTEN_RX_THD // Receive Interrupt
167 #define ADI_MAX32_UART_INT_CTS MXC_F_UART_INTEN_CTS_EV // CTS Modem Interrupt
168 #define ADI_MAX32_UART_INT_TX_OEM MXC_F_UART_INTEN_TX_OB // TX FIFO Almost Empty Interrupt
169 #else
170 // error flags
171 #define ADI_MAX32_UART_ERROR_OVERRUN MXC_F_UART_INT_FL_RX_OV
172 #define ADI_MAX32_UART_ERROR_PARITY MXC_F_UART_INT_FL_RX_PAR
173 #define ADI_MAX32_UART_ERROR_FRAMING MXC_F_UART_INT_FL_RX_FERR
174 // interrupt flag
175 #define ADI_MAX32_UART_INT_OE MXC_F_UART_INT_EN_RX_OV // Overrun Error Interrupt
176 #define ADI_MAX32_UART_INT_PE MXC_F_UART_INT_EN_RX_PAR // Parity Error Interrupt
177 #define ADI_MAX32_UART_INT_FE MXC_F_UART_INT_EN_RX_FERR // Framing Error Interrupt
178 #define ADI_MAX32_UART_INT_TX MXC_F_UART_INT_EN_TX_HE // Transmit Interrupt
179 #define ADI_MAX32_UART_INT_RX MXC_F_UART_INT_EN_RX_THD // Receive Interrupt
180 #define ADI_MAX32_UART_INT_CTS MXC_F_UART_INT_EN_CTS_EV // CTS Modem Interrupt
181 #define ADI_MAX32_UART_INT_TX_OEM MXC_F_UART_INT_EN_TX_OB // TX FIFO Almost Empty Interrupt
182 #endif
183 //#define ADI_MAX32_UART_INT_RT // Receive Timeout Interrupt
184 //#define ADI_MAX32_UART_INT_BE // Break Error Interrupt
185 //#define ADI_MAX32_UART_INT_EOT // End Of Transmission Interrupt
186
187 // parity
188 #define ADI_MAX32_UART_CFG_PARITY_NONE MXC_UART_PARITY_DISABLE
189 #define ADI_MAX32_UART_CFG_PARITY_ODD MXC_UART_PARITY_ODD_0
190 #define ADI_MAX32_UART_CFG_PARITY_EVEN MXC_UART_PARITY_EVEN_0
191 //#define ADI_MAX32_UART_CFG_PARITY_MARK
192 //#define ADI_MAX32_UART_CFG_PARITY_SPACE
193
194 /* Error interrupts */
195 #define ADI_MAX32_UART_ERROR_INTERRUPTS \
196 (ADI_MAX32_UART_INT_OE | ADI_MAX32_UART_INT_PE | ADI_MAX32_UART_INT_FE)
197
198 static inline int Wrap_MXC_UART_Init(mxc_uart_regs_t *uart)
199 {
200 int ret;
201
202 ret = MXC_UART_SetRXThreshold(uart, 1);
203
204 return ret;
205 }
206
207 static inline int Wrap_MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud,
208 int clock_source)
209 {
210 return MXC_UART_SetFrequency(uart, baud, (mxc_uart_clock_t)clock_source);
211 }
212
213 static inline void Wrap_MXC_UART_SetTxDMALevel(mxc_uart_regs_t *uart, uint8_t bytes)
214 {
215 uart->dma |= ((bytes & 0xF) << MXC_F_UART_DMA_TX_THD_VAL_POS);
216 }
217
218 static inline void Wrap_MXC_UART_SetRxDMALevel(mxc_uart_regs_t *uart, uint8_t bytes)
219 {
220 uart->dma |= ((bytes & 0xF) << MXC_F_UART_DMA_RX_THD_VAL_POS);
221 }
222
223 static inline void Wrap_MXC_UART_EnableTxDMA(mxc_uart_regs_t *uart)
224 {
225 uart->dma |= MXC_F_UART_DMA_TX_EN;
226 }
227
228 static inline void Wrap_MXC_UART_EnableRxDMA(mxc_uart_regs_t *uart)
229 {
230 uart->dma |= MXC_F_UART_DMA_RX_EN;
231 }
232
233 static inline void Wrap_MXC_UART_DisableTxDMA(mxc_uart_regs_t *uart)
234 {
235 uart->dma &= ~MXC_F_UART_DMA_TX_EN;
236 }
237
238 static inline void Wrap_MXC_UART_DisableRxDMA(mxc_uart_regs_t *uart)
239 {
240 uart->dma &= ~MXC_F_UART_DMA_RX_EN;
241 }
242
243 #endif // defined(CONFIG_SOC_MAX32690) || (CONFIG_SOC_MAX32655)
244
Wrap_MXC_UART_GetRegINTEN(mxc_uart_regs_t * uart)245 static inline unsigned int Wrap_MXC_UART_GetRegINTEN(mxc_uart_regs_t *uart)
246 {
247 #if defined(CONFIG_SOC_MAX32662)
248 return uart->inten;
249 #else
250 return uart->int_en;
251 #endif
252 }
253
254 #ifdef __cplusplus
255 }
256 #endif
257
258 #endif // LIBRARIES_ZEPHYR_MAX_INCLUDE_WRAP_MAX32_UART_H_
259
