81     spi->ctrl0 = (MXC_F_SPI_REVA_CTRL0_EN);  in MXC_SPI_RevA1_Init()
88         spi->ctrl0 |= MXC_F_SPI_REVA_CTRL0_MST_MODE;  in MXC_SPI_RevA1_Init()
90         spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_MST_MODE);  in MXC_SPI_RevA1_Init()
107             spi->ctrl0 |= MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS0;  in MXC_SPI_RevA1_Init()
111             spi->ctrl0 |= (MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS0 | MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS1);  in MXC_SPI_RevA1_Init()
115             spi->ctrl0 |= (MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS0 | MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS1 |  in MXC_SPI_RevA1_Init()
120             spi->ctrl0 |= (MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS0 | MXC_S_SPI_REVA_CTRL0_SS_ACTIVE_SS1 |  in MXC_SPI_RevA1_Init()
143     spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN);  in MXC_SPI_RevA1_Shutdown()
158     spi->ctrl0 = 0;  in MXC_SPI_RevA1_Shutdown()
258         spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN);  in MXC_SPI_RevA1_SetDataSize()
271         spi->ctrl0 |= (MXC_F_SPI_REVA_CTRL0_EN);  in MXC_SPI_RevA1_SetDataSize()
333     if (!(spi->ctrl0 & MXC_F_SPI_REVA_CTRL0_MST_MODE)) {  in MXC_SPI_RevA1_SetSlave()
342         spi->ctrl0 |= (1 << ssIdx) << MXC_F_SPI_REVA_CTRL0_SS_ACTIVE_POS;  in MXC_SPI_RevA1_SetSlave()
344         spi->ctrl0 &= ~MXC_F_SPI_REVA_CTRL0_SS_ACTIVE |  in MXC_SPI_RevA1_SetSlave()
352     return ((spi->ctrl0 & MXC_F_SPI_REVA_CTRL0_SS_ACTIVE) >> MXC_F_SPI_REVA_CTRL0_SS_ACTIVE_POS) >>  in MXC_SPI_RevA1_GetSlave()
451     spi->ctrl0 |= MXC_F_SPI_REVA_CTRL0_START;  in MXC_SPI_RevA1_StartTransmission()
474     spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN);  in MXC_SPI_RevA1_AbortTransmission()
475     spi->ctrl0 |= (MXC_F_SPI_REVA_CTRL0_EN);  in MXC_SPI_RevA1_AbortTransmission()
714         (req->spi)->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN);  in MXC_SPI_RevA1_TransSetup()
718     if ((req->spi)->ctrl0 & MXC_F_SPI_REVA_CTRL0_MST_MODE) {  in MXC_SPI_RevA1_TransSetup()
763     (req->spi)->ctrl0 |= (MXC_F_SPI_REVA_CTRL0_EN);  in MXC_SPI_RevA1_TransSetup()
779         spi->ctrl0 = (spi->ctrl0 & ~MXC_F_SPI_REVA_CTRL0_START) | MXC_F_SPI_REVA_CTRL0_SS_CTRL;  in MXC_SPI_RevA1_MasterTransHandler()
793         spi->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_START | MXC_F_SPI_REVA_CTRL0_SS_CTRL);  in MXC_SPI_RevA1_MasterTransHandler()
975             req->spi->ctrl0 &= ~MXC_F_SPI_REVA_CTRL0_SS_CTRL;  in MXC_SPI_RevA1_MasterTransactionDMA()
977             req->spi->ctrl0 |= MXC_F_SPI_REVA_CTRL0_SS_CTRL;  in MXC_SPI_RevA1_MasterTransactionDMA()
1349         if ((spi->ctrl0 & MXC_F_SPI_REVA_CTRL0_MST_MODE) >> MXC_F_SPI_REVA_CTRL0_MST_MODE_POS) {  in MXC_SPI_RevA1_AsyncHandler()