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Searched refs:syscon (Results 1 – 25 of 66) sorted by relevance

123

/Zephyr-latest/drivers/clock_control/
Dclock_control_lpc11u6x.c17 static void syscon_power_up(struct lpc11u6x_syscon_regs *syscon, in syscon_power_up() argument
21 syscon->pd_run_cfg = (syscon->pd_run_cfg & ~bit) in syscon_power_up()
24 syscon->pd_run_cfg = syscon->pd_run_cfg | bit in syscon_power_up()
29 static void syscon_set_pll_src(struct lpc11u6x_syscon_regs *syscon, in syscon_set_pll_src() argument
32 syscon->sys_pll_clk_sel = src; in syscon_set_pll_src()
33 syscon->sys_pll_clk_uen = 0; in syscon_set_pll_src()
34 syscon->sys_pll_clk_uen = 1; in syscon_set_pll_src()
44 static void syscon_setup_pll(struct lpc11u6x_syscon_regs *syscon, in syscon_setup_pll() argument
51 syscon->sys_pll_ctrl = val; in syscon_setup_pll()
54 static bool syscon_pll_locked(struct lpc11u6x_syscon_regs *syscon) in syscon_pll_locked() argument
[all …]
Dclock_control_ast10x0.c47 const struct device *syscon; member
54 const struct device *syscon = DEV_CFG(dev)->syscon; in aspeed_clock_control_on() local
68 syscon_write_reg(syscon, addr, BIT(clk_gate)); in aspeed_clock_control_on()
75 const struct device *syscon = DEV_CFG(dev)->syscon; in aspeed_clock_control_off() local
89 syscon_write_reg(syscon, addr, BIT(clk_gate)); in aspeed_clock_control_off()
97 const struct device *syscon = DEV_CFG(dev)->syscon; in aspeed_clock_control_get_rate() local
106 syscon_read_reg(syscon, CLK_SELECTION_REG4, &reg); in aspeed_clock_control_get_rate()
117 syscon_read_reg(syscon, CLK_SELECTION_REG5, &reg); in aspeed_clock_control_get_rate()
123 syscon_read_reg(syscon, CLK_SELECTION_REG4, &reg); in aspeed_clock_control_get_rate()
157 .syscon = DEVICE_DT_GET(DT_NODELABEL(syscon)), \
/Zephyr-latest/tests/drivers/syscon/src/
Dmain.c13 uint8_t var_in_res0[DT_REG_SIZE(DT_NODELABEL(syscon))] __attribute((__section__(RES_SECT)));
15 ZTEST(syscon, test_size) in ZTEST() argument
17 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in ZTEST()
18 const size_t expected_size = DT_REG_SIZE(DT_NODELABEL(syscon)); in ZTEST()
27 ZTEST(syscon, test_out_of_bounds) in ZTEST() argument
29 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in ZTEST()
32 zassert_equal(syscon_read_reg(dev, DT_REG_SIZE(DT_NODELABEL(syscon)), &val), -EINVAL); in ZTEST()
33 zassert_equal(syscon_write_reg(dev, DT_REG_SIZE(DT_NODELABEL(syscon)), val), -EINVAL); in ZTEST()
36 ZTEST(syscon, test_read) in ZTEST() argument
38 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in ZTEST()
[all …]
/Zephyr-latest/drivers/reset/
Dreset_ast10x0.c30 const struct device *syscon; member
36 const struct device *syscon = config->syscon; in aspeed_reset_line_assert() local
44 return syscon_write_reg(syscon, addr, BIT(id)); in aspeed_reset_line_assert()
50 const struct device *syscon = config->syscon; in aspeed_reset_line_deassert() local
58 return syscon_write_reg(syscon, addr, BIT(id)); in aspeed_reset_line_deassert()
64 const struct device *syscon = config->syscon; in aspeed_reset_status() local
74 ret = syscon_read_reg(syscon, addr, &reg_value); in aspeed_reset_status()
103 .syscon = DEVICE_DT_GET(DT_NODELABEL(syscon)), \
/Zephyr-latest/boards/arm/v2m_beetle/
Dv2m_beetle.dts54 clocks = <&syscon>;
61 clocks = <&syscon>;
68 clocks = <&syscon>;
75 clocks = <&sysclk &syscon>;
83 clocks = <&sysclk &syscon>;
99 clocks = <&syscon>;
108 clocks = <&syscon>;
117 clocks = <&syscon>;
126 clocks = <&syscon>;
129 syscon: syscon@4001f000 { label
[all …]
/Zephyr-latest/dts/arm/nxp/
Dnxp_mcxa156.dtsi33 syscon: syscon@40000000 { label
34 compatible = "nxp,lpc-syscon";
38 compatible = "nxp,lpc-syscon-reset";
56 clocks = <&syscon MCUX_PORT0_CLK>;
62 clocks = <&syscon MCUX_PORT1_CLK>;
68 clocks = <&syscon MCUX_PORT2_CLK>;
74 clocks = <&syscon MCUX_PORT3_CLK>;
80 clocks = <&syscon MCUX_PORT4_CLK>;
136 clocks = <&syscon MCUX_LPUART0_CLK>;
161 clocks = <&syscon MCUX_CTIMER0_CLK>;
[all …]
Dnxp_lpc51u68.dtsi26 syscon: syscon@40000000 { label
27 compatible = "nxp,lpc-syscon";
31 compatible = "nxp,lpc-syscon-reset";
100 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
109 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
118 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
127 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
136 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
145 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
154 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
Dnxp_mcxn94x_common.dtsi72 syscon: syscon@0 { label
73 compatible = "nxp,lpc-syscon";
77 compatible = "nxp,lpc-syscon-reset";
85 clocks = <&syscon MCUX_PORT0_CLK>;
91 clocks = <&syscon MCUX_PORT1_CLK>;
97 clocks = <&syscon MCUX_PORT2_CLK>;
103 clocks = <&syscon MCUX_PORT3_CLK>;
109 clocks = <&syscon MCUX_PORT4_CLK>;
115 clocks = <&syscon MCUX_PORT5_CLK>;
192 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
[all …]
Dnxp_mcxn23x_common.dtsi66 syscon: syscon@0 { label
67 compatible = "nxp,lpc-syscon";
71 compatible = "nxp,lpc-syscon-reset";
79 clocks = <&syscon MCUX_PORT0_CLK>;
85 clocks = <&syscon MCUX_PORT1_CLK>;
91 clocks = <&syscon MCUX_PORT2_CLK>;
97 clocks = <&syscon MCUX_PORT3_CLK>;
103 clocks = <&syscon MCUX_PORT4_CLK>;
109 clocks = <&syscon MCUX_PORT5_CLK>;
185 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
[all …]
Dnxp_lpc11u6x.dtsi91 clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
107 clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
125 clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
131 syscon: clock-controller@40048000 { label
132 compatible = "nxp,lpc11u6x-syscon";
139 clocks = <&syscon LPC11U6X_CLOCK_USART0>;
147 clocks = <&syscon LPC11U6X_CLOCK_USART1>;
155 clocks = <&syscon LPC11U6X_CLOCK_USART2>;
163 clocks = <&syscon LPC11U6X_CLOCK_USART3>;
171 clocks = <&syscon LPC11U6X_CLOCK_USART4>;
[all …]
Dnxp_lpc55S1x_common.dtsi75 syscon: syscon@0 { label
76 compatible = "nxp,lpc-syscon";
80 compatible = "nxp,lpc-syscon-reset";
168 clocks = <&syscon MCUX_CTIMER0_CLK>;
180 clocks = <&syscon MCUX_CTIMER1_CLK>;
192 clocks = <&syscon MCUX_CTIMER2_CLK>;
204 clocks = <&syscon MCUX_CTIMER3_CLK>;
216 clocks = <&syscon MCUX_CTIMER4_CLK>;
226 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
235 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
[all …]
Dnxp_lpc55S0x_common.dtsi68 syscon: syscon@0 { label
69 compatible = "nxp,lpc-syscon";
73 compatible = "nxp,lpc-syscon-reset";
158 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
167 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
176 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
185 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
194 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
203 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
212 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
Dnxp_lpc55S3x_common.dtsi73 syscon: syscon@0 { label
74 compatible = "nxp,lpc-syscon";
78 compatible = "nxp,lpc-syscon-reset";
189 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
200 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
211 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
222 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
233 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
244 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
255 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
Dnxp_lpc54xxx.dtsi41 syscon: syscon@40000000 { label
42 compatible = "nxp,lpc-syscon";
46 compatible = "nxp,lpc-syscon-reset";
163 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
172 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
181 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
190 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
199 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
208 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
217 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
Dnxp_lpc55S2x_common.dtsi88 syscon: syscon@0 { label
89 compatible = "nxp,lpc-syscon";
93 compatible = "nxp,lpc-syscon-reset";
191 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
200 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
209 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
218 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
227 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
236 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
245 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
Dnxp_lpc55S6x_common.dtsi113 syscon: syscon@0 { label
114 compatible = "nxp,lpc-syscon";
118 compatible = "nxp,lpc-syscon-reset";
235 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
246 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
257 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
268 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
279 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
290 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
301 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
/Zephyr-latest/tests/drivers/syscon/boards/
Dqemu_cortex_a53.overlay19 syscon: syscon@47000000 {
20 compatible = "syscon";
/Zephyr-latest/dts/riscv/
Dneorv32.dtsi79 syscon = <&sysinfo>;
86 syscon = <&sysinfo>;
109 syscon = <&sysinfo>;
120 syscon = <&sysinfo>;
131 syscon = <&sysinfo>;
134 sysinfo: syscon@ffffffe0 {
135 compatible = "neorv-sysinfo", "syscon";
/Zephyr-latest/drivers/cache/
Dcache_aspeed.c52 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in aspeed_cache_init()
115 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_data_disable()
127 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_instr_disable()
134 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_data_invd_all()
164 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_data_invd_range()
196 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_instr_invd_all()
225 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_instr_invd_range()
311 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_data_line_size_get()
323 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in cache_instr_line_size_get()
/Zephyr-latest/drivers/entropy/
Dentropy_neorv32_trng.c26 const struct device *syscon; member
91 if (!device_is_ready(config->syscon)) { in neorv32_trng_init()
96 err = syscon_read_reg(config->syscon, NEORV32_SYSINFO_FEATURES, &features); in neorv32_trng_init()
137 .syscon = DEVICE_DT_GET(DT_INST_PHANDLE(n, syscon)), \
/Zephyr-latest/dts/arm/aspeed/
Dast10x0.dtsi28 syscon: syscon@7e6e2000 { label
29 compatible = "syscon";
/Zephyr-latest/drivers/gpio/
Dgpio_neorv32.c29 const struct device *syscon; member
177 if (!device_is_ready(config->syscon)) { in neorv32_gpio_init()
182 err = syscon_read_reg(config->syscon, NEORV32_SYSINFO_FEATURES, &features); in neorv32_gpio_init()
218 .syscon = DEVICE_DT_GET(DT_INST_PHANDLE(n, syscon)), \
/Zephyr-latest/drivers/syscon/
DKconfig16 platform-specific code, to acquire a reference to the syscon node and
22 module-str = syscon
36 This option controls the priority of the syscon device
/Zephyr-latest/dts/arm/renesas/rz/
Drzt2m.dtsi73 compatible = "syscon";
80 compatible = "syscon";
87 compatible = "syscon";
94 compatible = "syscon";
101 compatible = "syscon";
108 compatible = "syscon";
/Zephyr-latest/dts/arm/nuvoton/npcm/
Dnpcm4.dtsi15 compatible = "syscon";
21 compatible = "syscon";

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