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Searched refs:IRQ_DEFAULT_PRIORITY (Results 1 – 25 of 59) sorted by relevance

123

/Zephyr-latest/dts/arm/nxp/
Dnxp_s32z27x_r52.dtsi69 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
70 <GIC_PPI 14 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
71 <GIC_PPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
72 <GIC_PPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
126 interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
133 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
140 interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
147 interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
154 interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
161 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
[all …]
Dnxp_s32z27x_rtu0_r52.dtsi28 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
36 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
44 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
52 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
60 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
69 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
78 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
87 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
96 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
105 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
Dnxp_s32z27x_rtu1_r52.dtsi28 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
36 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
44 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
52 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
60 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
69 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
78 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
87 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
96 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
105 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
/Zephyr-latest/dts/arm/renesas/rz/
Drzt2m.dtsi35 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
36 <GIC_PPI 14 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
37 <GIC_PPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
38 <GIC_PPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
117 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
118 <GIC_SPI 289 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
119 <GIC_SPI 290 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
120 <GIC_SPI 291 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
129 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
130 <GIC_SPI 301 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
[all …]
/Zephyr-latest/dts/arm64/qemu/
Dqemu-virt-a53.dtsi46 IRQ_DEFAULT_PRIORITY>,
48 IRQ_DEFAULT_PRIORITY>,
50 IRQ_DEFAULT_PRIORITY>,
52 IRQ_DEFAULT_PRIORITY>;
116 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
118 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
120 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
122 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
125 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
127 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
[all …]
Dqemu-virt-arm64.dtsi46 IRQ_DEFAULT_PRIORITY>,
48 IRQ_DEFAULT_PRIORITY>,
50 IRQ_DEFAULT_PRIORITY>,
52 IRQ_DEFAULT_PRIORITY>;
116 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
118 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
120 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
122 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
125 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
127 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
[all …]
/Zephyr-latest/dts/arm64/broadcom/
Dviper-a72.dtsi28 IRQ_DEFAULT_PRIORITY>,
30 IRQ_DEFAULT_PRIORITY>,
32 IRQ_DEFAULT_PRIORITY>,
34 IRQ_DEFAULT_PRIORITY>;
52 IRQ_DEFAULT_PRIORITY>;
58 IRQ_DEFAULT_PRIORITY>;
64 IRQ_DEFAULT_PRIORITY>;
Dbcm2711.dtsi30 IRQ_DEFAULT_PRIORITY>,
32 IRQ_DEFAULT_PRIORITY>,
34 IRQ_DEFAULT_PRIORITY>,
36 IRQ_DEFAULT_PRIORITY>;
66 IRQ_DEFAULT_PRIORITY>;
78 IRQ_DEFAULT_PRIORITY>;
91 IRQ_DEFAULT_PRIORITY>;
/Zephyr-latest/dts/arm64/nxp/
Dnxp_mimx93_a55.dtsi40 IRQ_DEFAULT_PRIORITY>,
42 IRQ_DEFAULT_PRIORITY>,
44 IRQ_DEFAULT_PRIORITY>,
46 IRQ_DEFAULT_PRIORITY>;
89 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
90 <GIC_SPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
99 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
100 <GIC_SPI 58 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
109 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
110 <GIC_SPI 60 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
[all …]
Dnxp_mimx95_a55.dtsi63 IRQ_DEFAULT_PRIORITY>,
65 IRQ_DEFAULT_PRIORITY>,
67 IRQ_DEFAULT_PRIORITY>,
69 IRQ_DEFAULT_PRIORITY>;
121 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
130 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
139 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
148 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
157 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
166 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
[all …]
Dnxp_mimx8mm_a53.dtsi56 IRQ_DEFAULT_PRIORITY>,
58 IRQ_DEFAULT_PRIORITY>,
60 IRQ_DEFAULT_PRIORITY>,
62 IRQ_DEFAULT_PRIORITY>;
78 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
79 <GIC_SPI 65 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
92 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
93 <GIC_SPI 67 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
106 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
107 <GIC_SPI 69 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
[all …]
Dnxp_mimx8mp_a53.dtsi50 IRQ_DEFAULT_PRIORITY>,
52 IRQ_DEFAULT_PRIORITY>,
54 IRQ_DEFAULT_PRIORITY>,
56 IRQ_DEFAULT_PRIORITY>;
84 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
85 <GIC_SPI 65 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
97 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
98 <GIC_SPI 67 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
110 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
111 <GIC_SPI 69 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
[all …]
Dnxp_mimx8mn_a53.dtsi56 IRQ_DEFAULT_PRIORITY>,
58 IRQ_DEFAULT_PRIORITY>,
60 IRQ_DEFAULT_PRIORITY>,
62 IRQ_DEFAULT_PRIORITY>;
78 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
79 <GIC_SPI 65 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
92 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
93 <GIC_SPI 67 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
106 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
107 <GIC_SPI 69 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
[all …]
Dnxp_ls1046a.dtsi62 IRQ_DEFAULT_PRIORITY>,
64 IRQ_DEFAULT_PRIORITY>,
66 IRQ_DEFAULT_PRIORITY>,
68 IRQ_DEFAULT_PRIORITY>;
75 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
/Zephyr-latest/dts/arm/xilinx/
Dzynqmp.dtsi39 IRQ_DEFAULT_PRIORITY>;
48 IRQ_DEFAULT_PRIORITY>;
56 IRQ_DEFAULT_PRIORITY>,
58 IRQ_DEFAULT_PRIORITY>,
60 IRQ_DEFAULT_PRIORITY>;
69 IRQ_DEFAULT_PRIORITY>,
71 IRQ_DEFAULT_PRIORITY>,
73 IRQ_DEFAULT_PRIORITY>;
82 IRQ_DEFAULT_PRIORITY>,
84 IRQ_DEFAULT_PRIORITY>,
[all …]
Dzynq7000.dtsi32 IRQ_DEFAULT_PRIORITY>,
34 IRQ_DEFAULT_PRIORITY>,
36 IRQ_DEFAULT_PRIORITY>,
38 IRQ_DEFAULT_PRIORITY>;
57 IRQ_DEFAULT_PRIORITY>,
59 IRQ_DEFAULT_PRIORITY>;
84 IRQ_DEFAULT_PRIORITY>,
86 IRQ_DEFAULT_PRIORITY>;
110 IRQ_DEFAULT_PRIORITY>;
119 IRQ_DEFAULT_PRIORITY>;
[all …]
/Zephyr-latest/dts/xtensa/espressif/esp32s3/
Desp32s3_common.dtsi124 <FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
125 <FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
136 <FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
137 <FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
164 interrupts = <RTC_CORE_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
173 interrupts = <RTC_CORE_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
203 interrupts = <UART0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
212 interrupts = <UART1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
221 interrupts = <UART2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
245 interrupts = <GPIO_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
[all …]
/Zephyr-latest/dts/arm/intel_socfpga_std/
Dsocfpga.dtsi60 interrupts = <0 38 0x04 IRQ_DEFAULT_PRIORITY>;
106 IRQ_DEFAULT_PRIORITY>,
108 IRQ_DEFAULT_PRIORITY>,
110 IRQ_DEFAULT_PRIORITY>,
112 IRQ_DEFAULT_PRIORITY>;
120 interrupts = <0 162 4 IRQ_DEFAULT_PRIORITY>;
129 interrupts = <0 163 4 IRQ_DEFAULT_PRIORITY>;
138 interrupts = <0 115 4 IRQ_DEFAULT_PRIORITY>;
146 interrupts = <0 120 4 IRQ_DEFAULT_PRIORITY>;
156 interrupts = <0 164 4 IRQ_DEFAULT_PRIORITY>;
[all …]
/Zephyr-latest/dts/arm64/ti/
Dti_am62x_a53.dtsi35 IRQ_DEFAULT_PRIORITY>,
37 IRQ_DEFAULT_PRIORITY>,
39 IRQ_DEFAULT_PRIORITY>,
41 IRQ_DEFAULT_PRIORITY>;
63 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
74 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
85 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
96 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
107 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
118 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
[all …]
/Zephyr-latest/dts/arm64/fvp/
Dfvp-aemv8r.dtsi44 IRQ_DEFAULT_PRIORITY>,
46 IRQ_DEFAULT_PRIORITY>,
48 IRQ_DEFAULT_PRIORITY>,
50 IRQ_DEFAULT_PRIORITY>;
75 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
84 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
93 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
102 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
112 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
/Zephyr-latest/dts/riscv/espressif/esp32c6/
Desp32c6_common.dtsi95 interrupts = <SYSTIMER_TARGET0_EDGE_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
106 interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
117 interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
135 interrupts = <LP_RTC_TIMER_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
150 interrupts = <GSPI2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
161 interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
170 interrupts = <TG1_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
196 <DMA_IN_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
197 <DMA_OUT_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
198 <DMA_IN_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
[all …]
/Zephyr-latest/dts/xtensa/espressif/esp32/
Desp32_common.dtsi77 interrupts = <ETH_MAC_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
132 <FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
133 <FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
144 <FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
145 <FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
173 interrupts = <RTC_CORE_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
203 interrupts = <FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>;
210 interrupts = <FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
217 interrupts = <UART0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
226 interrupts = <UART1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
[all …]
/Zephyr-latest/dts/arm64/intel/
Dintel_socfpga_agilex5.dtsi68 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
69 <GIC_PPI 14 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
70 <GIC_PPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
71 <GIC_PPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
110 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
142 IRQ_DEFAULT_PRIORITY>;
153 IRQ_DEFAULT_PRIORITY>;
164 IRQ_DEFAULT_PRIORITY>;
175 IRQ_DEFAULT_PRIORITY>;
235 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
[all …]
/Zephyr-latest/dts/arm/renesas/rcar/gen3/
Drcar_gen3_cr7.dtsi50 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
61 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
82 IRQ_DEFAULT_PRIORITY>,
84 IRQ_DEFAULT_PRIORITY>;
96 IRQ_DEFAULT_PRIORITY>;
108 IRQ_DEFAULT_PRIORITY>;
121 IRQ_DEFAULT_PRIORITY>;
131 IRQ_DEFAULT_PRIORITY>;
141 IRQ_DEFAULT_PRIORITY>;
/Zephyr-latest/boards/arm/fvp_base_revc_2xaemv8a/
Dfvp_base_revc_2xaemv8a.dts64 IRQ_DEFAULT_PRIORITY>,
66 IRQ_DEFAULT_PRIORITY>,
68 IRQ_DEFAULT_PRIORITY>,
70 IRQ_DEFAULT_PRIORITY>;
103 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
112 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
121 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
130 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
140 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;

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