1/*
2 * Copyright 2023 honglin leng <a909204013@gmail.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <mem.h>
8#include <freq.h>
9
10#include <arm64/armv8-a.dtsi>
11#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
12
13/ {
14	cpus {
15		#address-cells = <1>;
16		#size-cells = <0>;
17
18		cpu@0 {
19			device_type = "cpu";
20			compatible = "arm,cortex-a72";
21			reg = <0>;
22		};
23	};
24
25	interrupt-parent = <&gic>;
26
27	timer {
28		compatible = "arm,armv8-timer";
29		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL
30			      IRQ_DEFAULT_PRIORITY>,
31			     <GIC_PPI 14 IRQ_TYPE_LEVEL
32			      IRQ_DEFAULT_PRIORITY>,
33			     <GIC_PPI 11 IRQ_TYPE_LEVEL
34			      IRQ_DEFAULT_PRIORITY>,
35			     <GIC_PPI 10 IRQ_TYPE_LEVEL
36			      IRQ_DEFAULT_PRIORITY>;
37	};
38
39	soc {
40		sram0: memory@200000 {
41			device_type = "memory";
42			compatible = "mmio-sram";
43			reg = <0x200000 0x80000>;
44		};
45
46		gic: interrupt-controller@ff841000 {
47			compatible = "arm,gic-v2", "arm,gic";
48			reg = <0xff841000 0x1000>,
49			      <0xff842000 0x2000>;
50			interrupt-controller;
51			#interrupt-cells = <4>;
52			status = "okay";
53		};
54
55		gpio: gpio@fe200000 {
56			compatible = "simple-bus";
57			reg = <0xfe200000 0xf4>;
58			#address-cells = <1>;
59			#size-cells = <0>;
60
61			/* GPIO 0 ~ 27 */
62			gpio0: gpio@0 {
63				compatible = "brcm,bcm2711-gpio";
64				reg = <0>;
65				interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL
66					      IRQ_DEFAULT_PRIORITY>;
67				gpio-controller;
68				#gpio-cells = <2>;
69				ngpios = <28>;
70				status = "disabled";
71			};
72
73			/* GPIO 28 ~ 45 */
74			gpio1: gpio@1c {
75				compatible = "brcm,bcm2711-gpio";
76				reg = <28>;
77				interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL
78					      IRQ_DEFAULT_PRIORITY>;
79				gpio-controller;
80				#gpio-cells = <2>;
81				ngpios = <18>;
82				status = "disabled";
83			};
84		};
85
86		uart1: uart@fe215040 {
87			compatible = "brcm,bcm2711-aux-uart";
88			reg = <0xfe215040 0x40>;
89			clock-frequency = <DT_FREQ_M(500)>;
90			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL
91				      IRQ_DEFAULT_PRIORITY>;
92			status = "disabled";
93		};
94	};
95};
96