Lines Matching refs:IRQ_DEFAULT_PRIORITY

35 		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
36 				<GIC_PPI 14 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
37 				<GIC_PPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
38 				<GIC_PPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
117 			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
118 					<GIC_SPI 289 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
119 					<GIC_SPI 290 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
120 					<GIC_SPI 291 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
129 			interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
130 					<GIC_SPI 301 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
131 					<GIC_SPI 302 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
132 					<GIC_SPI 303 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
144 				interrupts = <GIC_SPI 6 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
145 					<GIC_SPI 7 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
146 					<GIC_SPI 8 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
147 					<GIC_SPI 9 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
148 					<GIC_SPI 10 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
149 					<GIC_SPI 11 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
150 					<GIC_SPI 12 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
151 					<GIC_SPI 13 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
152 					<GIC_SPI 14 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
153 					<GIC_SPI 15 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
154 					<GIC_SPI 16 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
155 					<GIC_SPI 17 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
156 					<GIC_SPI 18 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
157 					<GIC_SPI 19 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;