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Searched refs:GD32_RESET_GPIOA (Results 1 – 16 of 16) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dgd32f3x0.h53 #define GD32_RESET_GPIOA GD32_RESET_CONFIG(AHBRST, 17U) macro
Dgd32l23x.h30 #define GD32_RESET_GPIOA GD32_RESET_CONFIG(AHB1RST, 17U) macro
Dgd32vf103.h30 #define GD32_RESET_GPIOA GD32_RESET_CONFIG(APB2RST, 2U) macro
Dgd32a50x.h37 #define GD32_RESET_GPIOA GD32_RESET_CONFIG(AHBRST, 17U) macro
Dgd32e10x.h31 #define GD32_RESET_GPIOA GD32_RESET_CONFIG(APB2RST, 2U) macro
Dgd32f403.h31 #define GD32_RESET_GPIOA GD32_RESET_CONFIG(APB2RST, 2U) macro
Dgd32e50x.h31 #define GD32_RESET_GPIOA GD32_RESET_CONFIG(APB2RST, 2U) macro
Dgd32f4xx.h32 #define GD32_RESET_GPIOA GD32_RESET_CONFIG(AHB1RST, 0U) macro
/Zephyr-latest/dts/arm/gd/gd32f3x0/
Dgd32f3x0.dtsi133 resets = <&rctl GD32_RESET_GPIOA>;
/Zephyr-latest/dts/arm/gd/gd32l23x/
Dgd32l23x.dtsi133 resets = <&rctl GD32_RESET_GPIOA>;
/Zephyr-latest/dts/arm/gd/gd32a50x/
Dgd32a50x.dtsi228 resets = <&rctl GD32_RESET_GPIOA>;
/Zephyr-latest/dts/riscv/gd/
Dgd32vf103.dtsi254 resets = <&rctl GD32_RESET_GPIOA>;
/Zephyr-latest/dts/arm/gd/gd32e50x/
Dgd32e50x.dtsi231 resets = <&rctl GD32_RESET_GPIOA>;
/Zephyr-latest/dts/arm/gd/gd32e10x/
Dgd32e10x.dtsi195 resets = <&rctl GD32_RESET_GPIOA>;
/Zephyr-latest/dts/arm/gd/gd32f403/
Dgd32f403.dtsi233 resets = <&rctl GD32_RESET_GPIOA>;
/Zephyr-latest/dts/arm/gd/gd32f4xx/
Dgd32f4xx.dtsi305 resets = <&rctl GD32_RESET_GPIOA>;