Searched +full:stm32 +full:- +full:lptim (Results 1 – 25 of 37) sorted by relevance
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/Zephyr-latest/dts/bindings/timer/ |
D | st,stm32-lptim.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 STM32 lptim : low power timer 6 The lptim node to be used for counting ticks during lowpower modes 12 compatible: "st,stm32-lptim" 15 - name: st,stm32-timers.yaml 16 property-blocklist: 18 - resets 19 - st,prescaler 20 - st,countermode 29 Prescaler allows to achieve higher LPTIM timeout (up to 256s when lptim clocked by LSE) [all …]
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/Zephyr-latest/drivers/timer/ |
D | Kconfig.stm32_lptim | 1 # STM32 LPTIM configuration options 4 # SPDX-License-Identifier: Apache-2.0 6 DT_CHOSEN_STDBY_TIMER := st,lptim-stdby-timer 9 bool "STM32 Low Power Timer [EXPERIMENTAL]" 22 prompt "LPTIM clock value configuration" 24 This option is deprecated and configuration of LPTIM domain clock 30 Use LSI as LPTIM clock 35 Use LSE as LPTIM clock 45 hex "LPTIM AutoReload value" 53 For LPTIM configuration, a specific tick freq is advised [all …]
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/Zephyr-latest/samples/boards/st/power_mgmt/blinky/ |
D | README.rst | 1 .. zephyr:code-sample:: stm32_pm_blinky 4 Blink an LED using the GPIO API in a low-power context on STM32 12 Note that lptim instance selected for the low power timer is named **&stm32_lp_tick_source** 19 .. _stm32-pm-blinky-sample-requirements: 24 The board should support enabling PM. For a STM32 based target, it means that 26 in core sleep states, as LPTIM (:dtcompatible:`st,stm32-lptim`). 33 .. zephyr-app-commands:: 34 :zephyr-app: samples/basic/blinky 40 When LPTIM input clock has a prescaler, longer perdiod (up to 64 seconds)
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D | sample.yaml | 2 name: STM32 GPIO Power Management 4 sample.boards.stm32.power_mgmt.blinky: 6 - LED 7 - power 12 - "Device ready" 13 filter: dt_compat_enabled("zephyr,power-state") and 14 dt_enabled_alias_with_parent_compat("led0", "gpio-leds") and 15 (dt_compat_enabled("st,stm32-lptim") or 16 dt_chosen_enabled("zephyr,cortex-m-idle-timer")) 19 - nucleo_wb55rg [all …]
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/Zephyr-latest/samples/boards/st/power_mgmt/suspend_to_ram/ |
D | README.rst | 1 .. zephyr:code-sample:: stm32_pm_suspend_to_ram 3 :relevant-api: subsys_pm_device_runtime 5 Use suspend to RAM low power mode on STM32. 16 .. _stm32-pm-suspend-to-ram-sample-requirements: 21 The board should support enabling PM. For a STM32 based target, it means that 23 in core sleep states, as LPTIM (:dtcompatible:`st,stm32-lptim`). 25 for LPTIM (which is disabled). The board shall also have RAM retention to be 33 .. zephyr-app-commands:: 34 :zephyr-app: samples/boards/st/power_mgmt/suspend_to_ram
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D | sample.yaml | 2 name: STM32 PM Standby Power Management 4 sample.boards.stm32.power_mgmt.suspend_to_ram: 6 - power 11 - "Exit Standby" 12 filter: dt_compat_enabled("zephyr,power-state") and 13 dt_enabled_alias_with_parent_compat("led0", "gpio-leds") and 14 dt_compat_enabled("st,stm32-lptim") 17 - nucleo_wba55cg
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/Zephyr-latest/samples/boards/st/power_mgmt/adc/ |
D | sample.yaml | 2 name: STM32 ADC Power Management 4 sample.boards.stm32.power_mgmt.adc: 6 - adc 7 - power 12 - "Device ready" 13 filter: dt_compat_enabled("zephyr,power-state") and 14 dt_compat_enabled("st,stm32-adc") and 15 dt_compat_enabled("st,stm32-lptim")
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D | README.rst | 1 .. zephyr:code-sample:: stm32_pm_adc 3 :relevant-api: adc_interface 5 Use ADC in a low-power context on STM32. 13 .. _stm32-pm-adc-sample-requirements: 18 The board should support enabling PM. For a STM32 based target, it means that 20 in core sleep states, as LPTIM (:dtcompatible:`st,stm32-lptim`). 27 .. zephyr-app-commands:: 28 :zephyr-app: samples/boards/st/power_mgmt/adc 35 ``- adc@50040000, channel 3: 1158 = 932 mV``
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/Zephyr-latest/samples/boards/st/power_mgmt/standby_shutdown/ |
D | README.rst | 1 .. zephyr:code-sample:: stm32_pm_shutdown 3 :relevant-api: sys_poweroff subsys_pm_sys 5 Enter and exit Standby/Shutdown mode on STM32. 18 .. _stm32-pm-standby_shutdown-sample-requirements: 23 The board should support enabling PM. For a STM32 based target, it means that 25 in core sleep states, as LPTIM (:dtcompatible:`st,stm32-lptim`). 33 .. zephyr-app-commands:: 34 :zephyr-app: samples/boards/st/power_mgmt/standby_shutdown
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D | sample.yaml | 2 name: STM32 GPIO Power Management 4 sample.boards.stm32.power_mgmt.standby_shutdown: 6 - nucleo_l476rg 7 - disco_l475_iot1 9 - LED 10 - power 15 - "Reset cause: Reset pin" 16 - "Device ready: .*" 17 - "Press and hold the user button:" 18 - "when LED2 is OFF to power off" [all …]
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/Zephyr-latest/soc/st/stm32/ |
D | Kconfig.defconfig | 1 # ST Microelectronics STM32 all MCU lines 3 # Copyright (c) 2017, I-SENSE group of ICCS 4 # SPDX-License-Identifier: Apache-2.0 6 # Default configurations appplied tp the whole STM32 family 19 DT_STM32_RCC_CLOCK_FREQ := $(dt_node_int_prop_int,$(DT_STM32_RCC_PATH),clock-frequency) 31 # If sysclock is not LPTIM, tick of 10000 is too high for a frequency lower than 32MHz 36 # set the tick per sec as a divider of the LPTIM clock source 38 # SYS_CLOCK_TICKS_PER_SEC not too high compared to the LPTIM counter clock
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/Zephyr-latest/samples/boards/st/power_mgmt/serial_wakeup/ |
D | README.rst | 1 .. zephyr:code-sample:: stm32_pm_serial_wakeup 3 :relevant-api: subsys_pm_device 5 Wake up on serial activity on STM32. 13 .. _stm32-pm-serial-wakeup-sample-requirements: 18 1. The board should support enabling PM. For a STM32 based target, it means that 20 in core sleep states, as LPTIM (:dtcompatible:`st,stm32-lptim`). 25 - Clocked by an oscillator available in Stop mode (LSE, LSI) or an oscillator capable 27 - Matching oscillator sources should be enabled 28 - If LSE is selected as clock source and shell serial port is a LPUART current speed 30 - Port should be set as "wakeup-source" [all …]
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/Zephyr-latest/dts/arm/st/h5/ |
D | stm32h562.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/flash_controller/ospi.h> 10 #include <zephyr/dt-bindings/flash_controller/xspi.h> 17 #clock-cells = <0>; 18 compatible = "st,stm32u5-pll-clock"; 24 compatible = "st,stm32h562", "st,stm32h5", "simple-bus"; 26 pinctrl: pin-controller@42020000 { 28 compatible = "st,stm32-gpio"; 29 gpio-controller; 30 #gpio-cells = <2>; [all …]
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D | stm32h5.dtsi | 2 * Copyright (c) 2023-2024 STMicroelectronics 4 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv8-m.dtsi> 9 #include <zephyr/dt-bindings/adc/adc.h> 10 #include <zephyr/dt-bindings/clock/stm32h5_clock.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/i2c/i2c.h> 13 #include <zephyr/dt-bindings/reset/stm32h5_reset.h> 14 #include <zephyr/dt-bindings/dma/stm32_dma.h> 15 #include <zephyr/dt-bindings/pwm/pwm.h> [all …]
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/Zephyr-latest/soc/st/stm32/stm32u5x/ |
D | Kconfig | 4 # SPDX-License-Identifier: Apache-2.0 6 DT_CHOSEN_STDBY_TIMER := st,lptim-stdby-timer 25 …default $(dt_path_enabled,/cpus/power-states/state3) && $(dt_chosen_enabled,$(DT_CHOSEN_STDBY_TIME… 27 Enable support for STM32 STOP3 low-power mode. 28 Based on the Cortex-M33 Deepsleep mode combined with peripheral clock gating. 33 GPIOs are left floating and additional pull-up or pull-down can be applied
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/Zephyr-latest/dts/arm/st/u0/ |
D | stm32u073.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 11 compatible = "st,stm32u073", "st,stm32u0", "simple-bus"; 14 compatible = "st,stm32-i2c-v2"; 15 clock-frequency = <I2C_BITRATE_STANDARD>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 interrupt-names = "combined"; 26 compatible = "st,stm32-lptim"; 28 #address-cells = <1>; 29 #size-cells = <0>; [all …]
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D | stm32u0.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv6-m.dtsi> 9 #include <zephyr/dt-bindings/clock/stm32u0_clock.h> 10 #include <zephyr/dt-bindings/gpio/gpio.h> 11 #include <zephyr/dt-bindings/adc/adc.h> 12 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 15 #include <zephyr/dt-bindings/dma/stm32_dma.h> 16 #include <zephyr/dt-bindings/i2c/i2c.h> [all …]
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/Zephyr-latest/dts/arm/st/wba/ |
D | stm32wba.dtsi | 2 * Copyright (c) 2023-2024 STMicroelectronics 4 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv8-m.dtsi> 9 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 10 #include <zephyr/dt-bindings/clock/stm32wba_clock.h> 11 #include <zephyr/dt-bindings/reset/stm32wba_reset.h> 12 #include <zephyr/dt-bindings/adc/stm32u5_adc.h> 13 #include <zephyr/dt-bindings/gpio/gpio.h> 14 #include <zephyr/dt-bindings/i2c/i2c.h> 15 #include <zephyr/dt-bindings/pwm/pwm.h> [all …]
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/Zephyr-latest/dts/arm/st/u5/ |
D | stm32u5.dtsi | 7 * SPDX-License-Identifier: Apache-2.0 11 #include <arm/armv8-m.dtsi> 12 #include <zephyr/dt-bindings/adc/adc.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/clock/stm32u5_clock.h> 15 #include <zephyr/dt-bindings/gpio/gpio.h> 16 #include <zephyr/dt-bindings/i2c/i2c.h> 17 #include <zephyr/dt-bindings/flash_controller/ospi.h> 18 #include <zephyr/dt-bindings/reset/stm32u5_reset.h> 19 #include <zephyr/dt-bindings/dma/stm32_dma.h> [all …]
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/Zephyr-latest/dts/arm/st/l4/ |
D | stm32l4.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 10 #include <arm/armv7-m.dtsi> 11 #include <zephyr/dt-bindings/clock/stm32l4_clock.h> 12 #include <zephyr/dt-bindings/i2c/i2c.h> 13 #include <zephyr/dt-bindings/gpio/gpio.h> 14 #include <zephyr/dt-bindings/pwm/pwm.h> 15 #include <zephyr/dt-bindings/adc/adc.h> 16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 17 #include <zephyr/dt-bindings/dma/stm32_dma.h> 18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> [all …]
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/Zephyr-latest/dts/arm/st/l0/ |
D | stm32l0.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 8 #include <arm/armv6-m.dtsi> 9 #include <zephyr/dt-bindings/clock/stm32l0_clock.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/pwm/pwm.h> 13 #include <zephyr/dt-bindings/adc/adc.h> 14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 15 #include <zephyr/dt-bindings/dma/stm32_dma.h> 16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> [all …]
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/Zephyr-latest/dts/arm/st/g0/ |
D | stm32g0.dtsi | 3 * Copyright (c) 2019-2024 STMicroelectronics 6 * Copyright (c) 2021 G-Technologies Sdn. Bhd. 8 * SPDX-License-Identifier: Apache-2.0 11 #include <arm/armv6-m.dtsi> 12 #include <zephyr/dt-bindings/clock/stm32g0_clock.h> 13 #include <zephyr/dt-bindings/gpio/gpio.h> 14 #include <zephyr/dt-bindings/i2c/i2c.h> 15 #include <zephyr/dt-bindings/pwm/pwm.h> 16 #include <zephyr/dt-bindings/dma/stm32_dma.h> 17 #include <zephyr/dt-bindings/adc/adc.h> [all …]
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/Zephyr-latest/dts/arm/st/wl/ |
D | stm32wl.dtsi | 2 * Copyright (c) 2020-2024 STMicroelectronics 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 8 #include <zephyr/dt-bindings/clock/stm32wl_clock.h> 9 #include <zephyr/dt-bindings/gpio/gpio.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 11 #include <zephyr/dt-bindings/lora/sx126x.h> 12 #include <zephyr/dt-bindings/pwm/pwm.h> 13 #include <zephyr/dt-bindings/adc/adc.h> 14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> [all …]
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/Zephyr-latest/dts/arm/st/wb/ |
D | stm32wb.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 9 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/clock/stm32wb_clock.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/i2c/i2c.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/adc/adc.h> 15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 16 #include <zephyr/dt-bindings/dma/stm32_dma.h> 17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> [all …]
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/Zephyr-latest/dts/arm/st/g4/ |
D | stm32g4.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 10 #include <arm/armv7-m.dtsi> 11 #include <zephyr/dt-bindings/clock/stm32g4_clock.h> 12 #include <zephyr/dt-bindings/i2c/i2c.h> 13 #include <zephyr/dt-bindings/gpio/gpio.h> 14 #include <zephyr/dt-bindings/pwm/pwm.h> 15 #include <zephyr/dt-bindings/adc/adc.h> 16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 17 #include <zephyr/dt-bindings/dma/stm32_dma.h> 18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> [all …]
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