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/Zephyr-latest/dts/arm/renesas/ra/ra6/
Dra6-cm33-common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
10 #include <zephyr/dt-bindings/clock/ra_clock.h>
11 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m33";
23 #address-cells = <1>;
24 #size-cells = <1>;
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Dra6-cm4-common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
10 #include <zephyr/dt-bindings/clock/ra_clock.h>
11 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m4";
23 #address-cells = <1>;
24 #size-cells = <1>;
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/Zephyr-latest/dts/arm/renesas/ra/ra4/
Dra4-cm33-common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
10 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-m33";
22 #address-cells = <1>;
23 #size-cells = <1>;
26 compatible = "arm,armv8m-mpu";
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Dra4-cm4-common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
10 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-m4";
22 #address-cells = <1>;
23 #size-cells = <1>;
26 compatible = "arm,armv7m-mpu";
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/Zephyr-latest/dts/arm/renesas/ra/ra8/
Dra8x1.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8.1-m.dtsi>
10 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
11 #include <zephyr/dt-bindings/clock/ra_clock.h>
12 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m85";
23 #address-cells = <1>;
24 #size-cells = <1>;
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/Zephyr-latest/dts/arm/renesas/ra/ra2/
Dra2xx.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
10 #include <zephyr/dt-bindings/clock/ra_clock.h>
11 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m23";
28 compatible = "renesas,ra-system";
34 compatible = "renesas,ra-gpio-ioport";
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/Zephyr-latest/dts/bindings/misc/
Drenesas,ra-external-interrupt.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "renesas,ra-external-interrupt"
24 - "falling"
25 - "rising"
26 - "both-edges"
27 - "low-level"
31 renesas,digital-filtering:
36 renesas,sample-clock-div:
39 - 1
40 - 8
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/Zephyr-latest/boards/nxp/twr_ke18f/
Dtwr_ke18f.dts2 * Copyright (c) 2019-2021 Vestas Wind Systems A/S
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/clock/kinetis_scg.h>
11 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include "twr_ke18f-pinctrl.dtsi"
13 #include <zephyr/dt-bindings/input/input-event-codes.h>
27 pwm-led0 = &orange_pwm_led;
28 pwm-led1 = &yellow_pwm_led;
29 pwm-led2 = &green_pwm_led;
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/Zephyr-latest/tests/drivers/pwm/pwm_loopback/boards/
Dfrdm_ke17z.overlay4 * SPDX-License-Identifier: Apache-2.0
12 drive-strength = "low";
13 slew-rate = "slow";
20 drive-strength = "low";
21 slew-rate = "slow";
26 /* To test this sample, connect
27 * PTB14(J3-11) ---> PTE11(J2-2)
32 compatible = "test-pwm-loopback";
40 compatible = "nxp,ftm-pwm";
43 #pwm-cells = <3>;
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Dfrdm_ke17z512.overlay4 * SPDX-License-Identifier: Apache-2.0
12 drive-strength = "low";
13 slew-rate = "slow";
20 drive-strength = "low";
21 slew-rate = "slow";
26 /* To test this sample, connect
27 * PTB14(J3-11) ---> PTE11(J2-11)
32 compatible = "test-pwm-loopback";
40 compatible = "nxp,ftm-pwm";
43 #pwm-cells = <3>;
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/Zephyr-latest/dts/arm/nxp/
Dnxp_rt10xx.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/imx_ccm.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/memory-controller/nxp,flexram.h>
19 die-temp0 = &tempmon;
23 #address-cells = <1>;
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/Zephyr-latest/drivers/spi/
Dspi_xec_qmspi.c4 * SPDX-License-Identifier: Apache-2.0
58 REG8(&regs->TX_FIFO) = data8; in txb_wr8()
63 return REG8(&regs->RX_FIFO); in rxb_rd8()
74 uint32_t div, qmode; in qmspi_set_frequency() local
77 div = 0; /* max divider = 256 */ in qmspi_set_frequency()
79 div = MCHP_QMSPI_INPUT_CLOCK_FREQ_HZ / freq_hz; in qmspi_set_frequency()
80 if (div == 0) { in qmspi_set_frequency()
81 div = 1; /* max freq. divider = 1 */ in qmspi_set_frequency()
82 } else if (div > 0xffu) { in qmspi_set_frequency()
83 div = 0u; /* max divider = 256 */ in qmspi_set_frequency()
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/Zephyr-latest/boards/nxp/frdm_ke17z512/
Dfrdm_ke17z512.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "frdm_ke17z512-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
21 zephyr,code-partition = &slot0_partition;
22 zephyr,uart-mcumgr = &lpuart2;
24 zephyr,shell-uart = &lpuart2;
34 pwm-led0 = &red_pwm_led;
35 pwm-led1 = &green_pwm_led;
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/Zephyr-latest/drivers/adc/
Dadc_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
32 /* ADC sample time delay (Unit:us) */
34 /* Wait next clock rising (Clock source 32.768K) */
38 #define ADC_CHANNEL_OFFSET(ch) ((ch)-CHIP_ADC_CH13-ADC_CHANNEL_SHIFT)
47 /* Select analog clock division factor */
49 #define ADC_SACLKDIV(div) FIELD_PREP(ADC_SACLKDIV_MASK, div) argument
77 * The sample buffer pointer should be prepared
98 uint8_t channel_id = channel_cfg->channel_id; in adc_it8xxx2_channel_setup()
100 if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) { in adc_it8xxx2_channel_setup()
102 return -EINVAL; in adc_it8xxx2_channel_setup()
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/Zephyr-latest/doc/releases/
Drelease-notes-3.2.rst13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`).
15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`.
31 * CVE-2022-2993: Under embargo until 2022-11-03
33 * CVE-2022-2741: Under embargo until 2022-10-14
56 This definition can be used by third-party code to compile code conditional
58 Therefore, any third-party code integrated using the Zephyr build system will
91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates
95 allow distinguishing between an out of range bitrate/sample point, an unsupported bitrate, and a
96 resulting sample point outside the guard limit.
129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig
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Drelease-notes-2.5.rst27 * CVE-2021-3323: Under embargo until 2021-04-14
28 * CVE-2021-3321: Under embargo until 2021-04-14
29 * CVE-2021-3320: Under embargo until 2021-04-14
39 <https://github.com/zephyrproject-rtos/zephyr/issues?q=is%3Aissue+is%3Aopen+label%3Abug>`_.
56 * Changed vcnl4040 dts binding default for property 'proximity-trigger'.
63 * The :c:func:`mqtt_keepalive_time_left` function now returns -1 if keep alive
67 timeout usage must use the new-style k_timeout_t type and not the
87 GPIO-only regulators a devicetree property ``supply-gpios`` is defined as a
101 * ARM Musca-A board and SoC support deprecated and planned to be removed in 2.6.0.
146 sys_heap/k_heaps. Note that the new-style heap is a general
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Dmigration-guide-4.0.rst39 to define default flash and ram partitioning based on TF-M.
60 specify it using the west ``--runner`` or ``-r`` option. (:github:`75284`)
61 * ADC: Domain clock needs to be explicitly defined if property st,adc-clock-source = <ASYNC> is use…
85 Trusted Firmware-M
130 Chip variants with open-drain outputs (``mcp23x09``, ``mcp23x18``) now correctly reflect this in
134 * The ``power-domain`` property has been removed in favor of ``power-domains``.
136 ``power-domain-names`` is also available to optionally name each entry in
137 ``power-domains``. The number of cells in the ``power-domains`` property need
138 to be defined using ``#power-domain-cells``.
143 * For all STM32 ADC that selects an asynchronous clock through ``st,adc-clock-source`` property,
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