1/* 2 * Copyright (c) 2024-2025 Renesas Electronics Corporation 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <mem.h> 8#include <arm/armv8.1-m.dtsi> 9#include <freq.h> 10#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h> 11#include <zephyr/dt-bindings/clock/ra_clock.h> 12#include <zephyr/dt-bindings/pwm/ra_pwm.h> 13 14/ { 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu@0 { 20 device_type = "cpu"; 21 compatible = "arm,cortex-m85"; 22 reg = <0>; 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 mpu: mpu@e000ed90 { 27 compatible = "arm,armv8.1m-mpu"; 28 reg = <0xe000ed90 0x40>; 29 }; 30 }; 31 }; 32 33 soc { 34 interrupt-parent = <&nvic>; 35 36 sram0: memory@22000000 { 37 compatible = "mmio-sram"; 38 reg = <0x22000000 DT_SIZE_K(896)>; 39 }; 40 41 system: system@4001e000 { 42 compatible = "renesas,ra-system"; 43 reg = <0x4001e000 0x1000>; 44 status = "okay"; 45 }; 46 47 pinctrl: pin-controller@40400800 { 48 compatible = "renesas,ra-pinctrl-pfs"; 49 reg = <0x40400800 0x3c0>; 50 status = "okay"; 51 }; 52 53 ioport0: gpio@40400000 { 54 compatible = "renesas,ra-gpio-ioport"; 55 reg = <0x40400000 0x20>; 56 port = <0>; 57 gpio-controller; 58 #gpio-cells = <2>; 59 ngpios = <16>; 60 status = "disabled"; 61 }; 62 63 ioport1: gpio@40400020 { 64 compatible = "renesas,ra-gpio-ioport"; 65 reg = <0x40400020 0x20>; 66 port = <1>; 67 gpio-controller; 68 #gpio-cells = <2>; 69 ngpios = <16>; 70 status = "disabled"; 71 }; 72 73 ioport2: gpio@40400040 { 74 compatible = "renesas,ra-gpio-ioport"; 75 reg = <0x40400040 0x20>; 76 port = <2>; 77 gpio-controller; 78 #gpio-cells = <2>; 79 ngpios = <16>; 80 status = "disabled"; 81 }; 82 83 ioport3: gpio@40400060 { 84 compatible = "renesas,ra-gpio-ioport"; 85 reg = <0x40400060 0x20>; 86 port = <3>; 87 gpio-controller; 88 #gpio-cells = <2>; 89 ngpios = <16>; 90 status = "disabled"; 91 }; 92 93 ioport4: gpio@40400080 { 94 compatible = "renesas,ra-gpio-ioport"; 95 reg = <0x40400080 0x20>; 96 port = <4>; 97 gpio-controller; 98 #gpio-cells = <2>; 99 ngpios = <16>; 100 vbatts-pins = <2 3 4>; 101 status = "disabled"; 102 }; 103 104 ioport5: gpio@404000a0 { 105 compatible = "renesas,ra-gpio-ioport"; 106 reg = <0x404000a0 0x20>; 107 port = <5>; 108 gpio-controller; 109 #gpio-cells = <2>; 110 ngpios = <16>; 111 status = "disabled"; 112 }; 113 114 ioport6: gpio@404000c0 { 115 compatible = "renesas,ra-gpio-ioport"; 116 reg = <0x404000c0 0x20>; 117 port = <6>; 118 gpio-controller; 119 #gpio-cells = <2>; 120 ngpios = <16>; 121 status = "disabled"; 122 }; 123 124 ioport7: gpio@404000e0 { 125 compatible = "renesas,ra-gpio-ioport"; 126 reg = <0x404000e0 0x20>; 127 port = <7>; 128 gpio-controller; 129 #gpio-cells = <2>; 130 ngpios = <16>; 131 status = "disabled"; 132 }; 133 134 ioport8: gpio@40400100 { 135 compatible = "renesas,ra-gpio-ioport"; 136 reg = <0x40400100 0x20>; 137 port = <8>; 138 gpio-controller; 139 #gpio-cells = <2>; 140 ngpios = <16>; 141 status = "disabled"; 142 }; 143 144 ioport9: gpio@40400120 { 145 compatible = "renesas,ra-gpio-ioport"; 146 reg = <0x40400120 0x20>; 147 port = <9>; 148 gpio-controller; 149 #gpio-cells = <2>; 150 ngpios = <16>; 151 status = "disabled"; 152 }; 153 154 ioporta: gpio@40400140 { 155 compatible = "renesas,ra-gpio-ioport"; 156 reg = <0x40400140 0x20>; 157 port = <10>; 158 gpio-controller; 159 #gpio-cells = <2>; 160 ngpios = <16>; 161 status = "disabled"; 162 }; 163 164 ioportb: gpio@40400160 { 165 compatible = "renesas,ra-gpio-ioport"; 166 reg = <0x40400160 0x20>; 167 port = <11>; 168 gpio-controller; 169 #gpio-cells = <2>; 170 ngpios = <16>; 171 status = "disabled"; 172 }; 173 174 iic0: iic0@4025e000 { 175 compatible = "renesas,ra-iic"; 176 channel = <0>; 177 reg = <0x4025E000 0x100>; 178 status = "disabled"; 179 }; 180 iic1: iic1@4025e100 { 181 compatible = "renesas,ra-iic"; 182 channel = <1>; 183 interrupts = <91 1>, <92 1>, <93 1>, <94 1>; 184 interrupt-names = "rxi", "txi", "tei", "eri"; 185 reg = <0x4025E100 0x100>; 186 status = "disabled"; 187 }; 188 189 sci0: sci0@40358000 { 190 compatible = "renesas,ra-sci"; 191 interrupts = <4 1>, <5 1>, <6 1>, <7 1>; 192 interrupt-names = "rxi", "txi", "tei", "eri"; 193 reg = <0x40358000 0x100>; 194 clocks = <&sciclk MSTPB 31>; 195 status = "disabled"; 196 uart { 197 compatible = "renesas,ra8-uart-sci-b"; 198 channel = <0>; 199 status = "disabled"; 200 }; 201 }; 202 203 sci1: sci1@40358100 { 204 compatible = "renesas,ra-sci"; 205 interrupts = <8 1>, <9 1>, <10 1>, <11 1>; 206 interrupt-names = "rxi", "txi", "tei", "eri"; 207 reg = <0x40358100 0x100>; 208 clocks = <&sciclk MSTPB 30>; 209 status = "disabled"; 210 uart { 211 compatible = "renesas,ra8-uart-sci-b"; 212 channel = <1>; 213 status = "disabled"; 214 }; 215 }; 216 217 sci2: sci2@40358200 { 218 compatible = "renesas,ra-sci"; 219 interrupts = <12 1>, <13 1>, <14 1>, <15 1>; 220 interrupt-names = "rxi", "txi", "tei", "eri"; 221 reg = <0x40358200 0x100>; 222 clocks = <&sciclk MSTPB 29>; 223 status = "disabled"; 224 uart { 225 compatible = "renesas,ra8-uart-sci-b"; 226 channel = <2>; 227 status = "disabled"; 228 }; 229 }; 230 231 sci3: sci3@40358300 { 232 compatible = "renesas,ra-sci"; 233 interrupts = <16 1>, <17 1>, <18 1>, <19 1>; 234 interrupt-names = "rxi", "txi", "tei", "eri"; 235 reg = <0x40358300 0x100>; 236 clocks = <&sciclk MSTPB 28>; 237 status = "disabled"; 238 uart { 239 compatible = "renesas,ra8-uart-sci-b"; 240 channel = <3>; 241 status = "disabled"; 242 }; 243 }; 244 245 sci4: sci4@40358400 { 246 compatible = "renesas,ra-sci"; 247 interrupts = <20 1>, <21 1>, <22 1>, <23 1>; 248 interrupt-names = "rxi", "txi", "tei", "eri"; 249 reg = <0x40358400 0x100>; 250 clocks = <&sciclk MSTPB 27>; 251 status = "disabled"; 252 uart { 253 compatible = "renesas,ra8-uart-sci-b"; 254 channel = <4>; 255 status = "disabled"; 256 }; 257 }; 258 259 sci9: sci9@40358900 { 260 compatible = "renesas,ra-sci"; 261 interrupts = <24 1>, <25 1>, <26 1>, <27 1>; 262 interrupt-names = "rxi", "txi", "tei", "eri"; 263 reg = <0x40358900 0x100>; 264 clocks = <&sciclk MSTPB 22>; 265 status = "disabled"; 266 uart { 267 compatible = "renesas,ra8-uart-sci-b"; 268 channel = <9>; 269 status = "disabled"; 270 }; 271 }; 272 273 flash: flash-controller@40100000 { 274 compatible = "renesas,ra-flash-hp-controller"; 275 reg = <0x40100000 0x20000>; 276 #address-cells = <1>; 277 #size-cells = <1>; 278 interrupts = <49 1>, <50 1>; 279 interrupt-names = "frdyi", "fiferr"; 280 reserved-area-num = <33>; 281 block-32kb-linear-end = <68>; 282 block-32kb-dual-low-end = <36>; 283 block-32kb-dual-high-end = <106>; 284 }; 285 286 adc0: adc@40332000 { 287 compatible = "renesas,ra-adc"; 288 interrupts = <38 1>; 289 interrupt-names = "scanend"; 290 reg = <0x40332000 0x100>; 291 #io-channel-cells = <1>; 292 vref-mv = <3300>; 293 channel-available-mask = <0xf01f7>; 294 status = "disabled"; 295 }; 296 297 adc1: adc@40332200 { 298 compatible = "renesas,ra-adc"; 299 interrupts = <39 1>; 300 interrupt-names = "scanend"; 301 reg = <0x40332200 0x100>; 302 #io-channel-cells = <1>; 303 vref-mv = <3300>; 304 channel-available-mask = <0x7f0077>; 305 status = "disabled"; 306 }; 307 308 dac_global: dac_global@40333000 { 309 compatible = "renesas,ra-dac-global"; 310 reg = <0x40333000 0x10c4>; 311 #address-cells = <1>; 312 #size-cells = <0>; 313 314 dac0: dac@0 { 315 compatible = "renesas,ra-dac"; 316 #io-channel-cells = <1>; 317 reg = <0>; 318 status = "disabled"; 319 }; 320 321 dac1: dac@1 { 322 compatible = "renesas,ra-dac"; 323 #io-channel-cells = <1>; 324 reg = <1>; 325 status = "disabled"; 326 }; 327 }; 328 329 trng: trng { 330 compatible = "renesas,ra-rsip-e51a-trng"; 331 }; 332 333 spi0: spi@4035c000 { 334 compatible = "renesas,ra8-spi-b"; 335 #address-cells = <1>; 336 #size-cells = <0>; 337 channel = <0>; 338 clocks = <&pclka MSTPB 19>; 339 clock-names = "spiclk"; 340 interrupts = <28 1>, <29 1>, <30 1>, <31 1>; 341 interrupt-names = "rxi", "txi", "tei", "eri"; 342 reg = <0x4035c000 0x100>; 343 status = "disabled"; 344 }; 345 346 spi1: spi@4035c100 { 347 compatible = "renesas,ra8-spi-b"; 348 #address-cells = <1>; 349 #size-cells = <0>; 350 channel = <1>; 351 clocks = <&pclka MSTPB 18>; 352 clock-names = "spiclk"; 353 interrupts = <32 1>, <33 1>, <34 1>, <35 1>; 354 interrupt-names = "rxi", "txi", "tei", "eri"; 355 reg = <0x4035c100 0x100>; 356 status = "disabled"; 357 }; 358 359 pwm0: pwm0@40322000 { 360 compatible = "renesas,ra-pwm"; 361 divider = <RA_PWM_SOURCE_DIV_1>; 362 channel = <RA_PWM_CHANNEL_0>; 363 clocks = <&pclkd MSTPE 31>; 364 reg = <0x40322000 0x100>; 365 #pwm-cells = <3>; 366 status = "disabled"; 367 }; 368 369 pwm1: pwm1@40322100 { 370 compatible = "renesas,ra-pwm"; 371 divider = <RA_PWM_SOURCE_DIV_1>; 372 channel = <RA_PWM_CHANNEL_1>; 373 clocks = <&pclkd MSTPE 30>; 374 reg = <0x40322100 0x100>; 375 #pwm-cells = <3>; 376 status = "disabled"; 377 }; 378 379 pwm2: pwm2@40322200 { 380 compatible = "renesas,ra-pwm"; 381 divider = <RA_PWM_SOURCE_DIV_1>; 382 channel = <RA_PWM_CHANNEL_2>; 383 clocks = <&pclkd MSTPE 29>; 384 reg = <0x40322200 0x100>; 385 #pwm-cells = <3>; 386 status = "disabled"; 387 }; 388 389 pwm3: pwm3@40322300 { 390 compatible = "renesas,ra-pwm"; 391 divider = <RA_PWM_SOURCE_DIV_1>; 392 channel = <RA_PWM_CHANNEL_3>; 393 clocks = <&pclkd MSTPE 28>; 394 reg = <0x40322300 0x100>; 395 #pwm-cells = <3>; 396 status = "disabled"; 397 }; 398 399 pwm4: pwm4@40322400 { 400 compatible = "renesas,ra-pwm"; 401 divider = <RA_PWM_SOURCE_DIV_1>; 402 channel = <RA_PWM_CHANNEL_4>; 403 clocks = <&pclkd MSTPE 27>; 404 reg = <0x40322400 0x100>; 405 #pwm-cells = <3>; 406 status = "disabled"; 407 }; 408 409 pwm5: pwm5@40322500 { 410 compatible = "renesas,ra-pwm"; 411 divider = <RA_PWM_SOURCE_DIV_1>; 412 channel = <RA_PWM_CHANNEL_5>; 413 clocks = <&pclkd MSTPE 26>; 414 reg = <0x40322500 0x100>; 415 #pwm-cells = <3>; 416 status = "disabled"; 417 }; 418 419 pwm6: pwm6@40322600 { 420 compatible = "renesas,ra-pwm"; 421 divider = <RA_PWM_SOURCE_DIV_1>; 422 channel = <RA_PWM_CHANNEL_6>; 423 clocks = <&pclkd MSTPE 25>; 424 reg = <0x40322600 0x100>; 425 #pwm-cells = <3>; 426 status = "disabled"; 427 }; 428 429 pwm7: pwm7@40322700 { 430 compatible = "renesas,ra-pwm"; 431 divider = <RA_PWM_SOURCE_DIV_1>; 432 channel = <RA_PWM_CHANNEL_7>; 433 clocks = <&pclkd MSTPE 24>; 434 reg = <0x40322700 0x100>; 435 #pwm-cells = <3>; 436 status = "disabled"; 437 }; 438 439 pwm8: pwm8@40322800 { 440 compatible = "renesas,ra-pwm"; 441 divider = <RA_PWM_SOURCE_DIV_1>; 442 channel = <RA_PWM_CHANNEL_8>; 443 clocks = <&pclkd MSTPE 23>; 444 reg = <0x40322800 0x100>; 445 #pwm-cells = <3>; 446 status = "disabled"; 447 }; 448 449 pwm9: pwm9@40322900 { 450 compatible = "renesas,ra-pwm"; 451 divider = <RA_PWM_SOURCE_DIV_1>; 452 channel = <RA_PWM_CHANNEL_9>; 453 clocks = <&pclkd MSTPE 22>; 454 reg = <0x40322900 0x100>; 455 #pwm-cells = <3>; 456 status = "disabled"; 457 }; 458 459 pwm10: pwm10@40322a00 { 460 compatible = "renesas,ra-pwm"; 461 divider = <RA_PWM_SOURCE_DIV_1>; 462 channel = <RA_PWM_CHANNEL_10>; 463 clocks = <&pclkd MSTPE 21>; 464 reg = <0x40322a00 0x100>; 465 #pwm-cells = <3>; 466 status = "disabled"; 467 }; 468 469 pwm11: pwm11@40322b00 { 470 compatible = "renesas,ra-pwm"; 471 divider = <RA_PWM_SOURCE_DIV_1>; 472 channel = <RA_PWM_CHANNEL_11>; 473 clocks = <&pclkd MSTPE 20>; 474 reg = <0x40322b00 0x100>; 475 #pwm-cells = <3>; 476 status = "disabled"; 477 }; 478 479 pwm12: pwm12@40322c00 { 480 compatible = "renesas,ra-pwm"; 481 divider = <RA_PWM_SOURCE_DIV_1>; 482 channel = <RA_PWM_CHANNEL_12>; 483 clocks = <&pclkd MSTPE 19>; 484 reg = <0x40322c00 0x100>; 485 #pwm-cells = <3>; 486 status = "disabled"; 487 }; 488 489 pwm13: pwm13@40322d00 { 490 compatible = "renesas,ra-pwm"; 491 divider = <RA_PWM_SOURCE_DIV_1>; 492 channel = <RA_PWM_CHANNEL_13>; 493 clocks = <&pclkd MSTPE 18>; 494 reg = <0x40322d00 0x100>; 495 #pwm-cells = <3>; 496 status = "disabled"; 497 }; 498 499 option_setting_ofs: option_setting_ofs@300a100 { 500 compatible = "zephyr,memory-region"; 501 reg = <0x0300a100 0x18>; 502 zephyr,memory-region = "OPTION_SETTING_OFS"; 503 status = "okay"; 504 }; 505 506 option_setting_sas: option_setting_sas@300a134 { 507 compatible = "zephyr,memory-region"; 508 reg = <0x0300a134 0xcc>; 509 zephyr,memory-region = "OPTION_SETTING_SAS"; 510 status = "okay"; 511 }; 512 513 option_setting_s: option_setting_s@300a200 { 514 compatible = "zephyr,memory-region"; 515 reg = <0x0300a200 0x100>; 516 zephyr,memory-region = "OPTION_SETTING_S"; 517 status = "okay"; 518 }; 519 520 agt0: agt@40221000 { 521 compatible = "renesas,ra-agt"; 522 channel = <0>; 523 reg = <0x40221000 0x100>; 524 interrupts = <83 1>, <84 1>; 525 interrupt-names = "agti", "agtcmai"; 526 renesas,count-source = "AGT_CLOCK_LOCO"; 527 renesas,prescaler = <0>; 528 renesas,resolution = <16>; 529 status = "disabled"; 530 531 counter { 532 compatible = "renesas,ra-agt-counter"; 533 status = "disabled"; 534 }; 535 }; 536 537 agt1: agt@40221100 { 538 compatible = "renesas,ra-agt"; 539 channel = <1>; 540 reg = <0x40221100 0x100>; 541 interrupts = <85 1>, <86 1>; 542 interrupt-names = "agti", "agtcmai"; 543 renesas,count-source = "AGT_CLOCK_LOCO"; 544 renesas,prescaler = <0>; 545 renesas,resolution = <16>; 546 status = "disabled"; 547 548 counter { 549 compatible = "renesas,ra-agt-counter"; 550 status = "disabled"; 551 }; 552 }; 553 554 canfd_global: canfd_global@40380000 { 555 compatible = "renesas,ra-canfd-global"; 556 interrupts = <40 1>, <41 1>; 557 interrupt-names = "rxf", "glerr"; 558 clocks = <&pclka 0 0>, <&pclke 0 0>; 559 clock-names = "opclk", "ramclk"; 560 dll-min-freq = <DT_FREQ_M(8)>; 561 dll-max-freq = <DT_FREQ_M(80)>; 562 reg = <0x40380000 0x4000>; 563 status = "disabled"; 564 565 canfd0: canfd0 { 566 compatible = "renesas,ra-canfd"; 567 channel = <0>; 568 interrupts = <43 12>, <44 12>, <45 12>; 569 interrupt-names = "err", "tx", "rx"; 570 clocks = <&canfdclk MSTPC 27>; 571 clock-names = "dllclk"; 572 status = "disabled"; 573 }; 574 575 canfd1: canfd1 { 576 compatible = "renesas,ra-canfd"; 577 channel = <1>; 578 interrupts = <46 1>, <47 1>, <48 1>; 579 interrupt-names = "err", "tx", "rx"; 580 clocks = <&canfdclk MSTPC 26>; 581 clock-names = "dllclk"; 582 status = "disabled"; 583 }; 584 }; 585 586 eth: ethernet@40354100 { 587 compatible = "renesas,ra-ethernet"; 588 reg = <0x40354100 0xfc>; 589 interrupts = <42 0>; 590 local-mac-address = [00 11 22 33 44 55]; 591 phy-connection-type = "rmii"; 592 status = "disabled"; 593 }; 594 595 mdio: mdio { 596 compatible = "renesas,ra-mdio"; 597 #address-cells = <1>; 598 #size-cells = <0>; 599 status = "disabled"; 600 }; 601 602 port_irq0: external-interrupt@40006000 { 603 compatible = "renesas,ra-external-interrupt"; 604 reg = <0x40006000 0x1>; 605 channel = <0>; 606 renesas,sample-clock-div = <64>; 607 #port-irq-cells = <0>; 608 status = "disabled"; 609 }; 610 611 port_irq1: external-interrupt@40006001 { 612 compatible = "renesas,ra-external-interrupt"; 613 reg = <0x40006001 0x1>; 614 channel = <1>; 615 renesas,sample-clock-div = <64>; 616 #port-irq-cells = <0>; 617 status = "disabled"; 618 }; 619 620 port_irq2: external-interrupt@40006002 { 621 compatible = "renesas,ra-external-interrupt"; 622 reg = <0x40006002 0x1>; 623 channel = <2>; 624 renesas,sample-clock-div = <64>; 625 #port-irq-cells = <0>; 626 status = "disabled"; 627 }; 628 629 port_irq3: external-interrupt@40006003 { 630 compatible = "renesas,ra-external-interrupt"; 631 reg = <0x40006003 0x1>; 632 channel = <3>; 633 renesas,sample-clock-div = <64>; 634 #port-irq-cells = <0>; 635 status = "disabled"; 636 }; 637 638 port_irq4: external-interrupt@40006004 { 639 compatible = "renesas,ra-external-interrupt"; 640 reg = <0x40006004 0x1>; 641 channel = <4>; 642 renesas,sample-clock-div = <64>; 643 #port-irq-cells = <0>; 644 status = "disabled"; 645 }; 646 647 port_irq5: external-interrupt@40006005 { 648 compatible = "renesas,ra-external-interrupt"; 649 reg = <0x40006005 0x1>; 650 channel = <5>; 651 renesas,sample-clock-div = <64>; 652 #port-irq-cells = <0>; 653 status = "disabled"; 654 }; 655 656 port_irq6: external-interrupt@40006006 { 657 compatible = "renesas,ra-external-interrupt"; 658 reg = <0x40006006 0x1>; 659 channel = <6>; 660 renesas,sample-clock-div = <64>; 661 #port-irq-cells = <0>; 662 status = "disabled"; 663 }; 664 665 port_irq7: external-interrupt@40006007 { 666 compatible = "renesas,ra-external-interrupt"; 667 reg = <0x40006007 0x1>; 668 channel = <7>; 669 renesas,sample-clock-div = <64>; 670 #port-irq-cells = <0>; 671 status = "disabled"; 672 }; 673 674 port_irq8: external-interrupt@40006008 { 675 compatible = "renesas,ra-external-interrupt"; 676 reg = <0x40006008 0x1>; 677 channel = <8>; 678 renesas,sample-clock-div = <64>; 679 #port-irq-cells = <0>; 680 status = "disabled"; 681 }; 682 683 port_irq9: external-interrupt@40006009 { 684 compatible = "renesas,ra-external-interrupt"; 685 reg = <0x40006009 0x1>; 686 channel = <9>; 687 renesas,sample-clock-div = <64>; 688 #port-irq-cells = <0>; 689 status = "disabled"; 690 }; 691 692 port_irq10: external-interrupt@4000600a { 693 compatible = "renesas,ra-external-interrupt"; 694 reg = <0x4000600a 0x1>; 695 channel = <10>; 696 renesas,sample-clock-div = <64>; 697 #port-irq-cells = <0>; 698 status = "disabled"; 699 }; 700 701 port_irq11: external-interrupt@4000600b { 702 compatible = "renesas,ra-external-interrupt"; 703 reg = <0x4000600b 0x1>; 704 channel = <11>; 705 renesas,sample-clock-div = <64>; 706 #port-irq-cells = <0>; 707 status = "disabled"; 708 }; 709 710 port_irq12: external-interrupt@4000600c { 711 compatible = "renesas,ra-external-interrupt"; 712 reg = <0x4000600c 0x1>; 713 channel = <12>; 714 renesas,sample-clock-div = <64>; 715 #port-irq-cells = <0>; 716 status = "disabled"; 717 }; 718 719 port_irq13: external-interrupt@4000600d { 720 compatible = "renesas,ra-external-interrupt"; 721 reg = <0x4000600d 0x1>; 722 channel = <13>; 723 renesas,sample-clock-div = <64>; 724 #port-irq-cells = <0>; 725 status = "disabled"; 726 }; 727 728 port_irq14: external-interrupt@4000600e { 729 compatible = "renesas,ra-external-interrupt"; 730 reg = <0x4000600e 0x1>; 731 channel = <14>; 732 renesas,sample-clock-div = <64>; 733 #port-irq-cells = <0>; 734 status = "disabled"; 735 }; 736 737 port_irq15: external-interrupt@4000600f { 738 compatible = "renesas,ra-external-interrupt"; 739 reg = <0x4000600f 0x1>; 740 channel = <15>; 741 renesas,sample-clock-div = <64>; 742 #port-irq-cells = <0>; 743 status = "disabled"; 744 }; 745 746 sdhc0: sdhc@40252000 { 747 compatible = "renesas,ra-sdhc"; 748 channel = <0>; 749 bus-width = <4>; 750 sd-support; 751 mmc-support; 752 card-detect; 753 max-bus-freq = <DT_FREQ_M(52)>; 754 clocks = <&pclkb MSTPC 12>; 755 reg = <0x40252000 0x0400>; 756 interrupt-names = "accs", "card", "dma-req"; 757 interrupts = <57 12>, <58 12>, <59 12>; 758 status = "disabled"; 759 }; 760 761 sdhc1: sdhc@40252400 { 762 compatible = "renesas,ra-sdhc"; 763 channel = <1>; 764 bus-width = <4>; 765 sd-support; 766 mmc-support; 767 card-detect; 768 max-bus-freq = <DT_FREQ_M(52)>; 769 clocks = <&pclkb MSTPC 11>; 770 reg = <0x40252400 0x0400>; 771 status = "disabled"; 772 }; 773 774 wdt: wdt@40083400 { 775 compatible = "renesas,ra-wdt"; 776 reg = <0x40083400 0x200>; 777 clocks = <&pclkb 0 0>; 778 status = "disabled"; 779 }; 780 781 usbfs: usbfs@40250000 { 782 compatible = "renesas,ra-usbfs"; 783 reg = <0x40250000 0x2000>; 784 interrupts = <55 12>, <56 12>; 785 interrupt-names = "usbfs-i", "usbfs-r"; 786 num-bidir-endpoints = <10>; 787 phys = <&usbfs_phy>; 788 phys-clock = <&uclk>; 789 status = "disabled"; 790 791 udc { 792 compatible = "renesas,ra-udc"; 793 status = "disabled"; 794 }; 795 }; 796 797 acmphs_global: acmphs_global@40236000 { 798 compatible = "renesas,ra-acmphs-global"; 799 reg = <0x40236000 0x200>; 800 status = "disabled"; 801 802 acmphs0: acmphs0 { 803 compatible = "renesas,ra-acmphs"; 804 channel = <0>; 805 status = "disabled"; 806 }; 807 808 acmphs1: acmphs1 { 809 compatible = "renesas,ra-acmphs"; 810 channel = <1>; 811 status = "disabled"; 812 }; 813 }; 814 }; 815 816 usbfs_phy: usbfs-phy { 817 compatible = "usb-nop-xceiv"; 818 #phy-cells = <0>; 819 }; 820}; 821 822&nvic { 823 arm,num-irq-priority-bits = <4>; 824}; 825
