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Searched +full:pullup +full:- +full:mask (Results 1 – 16 of 16) sorted by relevance

/Zephyr-latest/drivers/gpio/
Dgpio_kscan_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
42 const struct gpio_kscan_cfg *const config = dev->config; in gpio_kscan_it8xxx2_configure()
43 volatile uint8_t *reg_ksi_kso_gctrl = config->reg_ksi_kso_gctrl; in gpio_kscan_it8xxx2_configure()
44 volatile uint8_t *reg_ksi_kso_goen = config->reg_ksi_kso_goen; in gpio_kscan_it8xxx2_configure()
45 volatile uint8_t *reg_ksi_kso_gdat = config->reg_ksi_kso_gdat; in gpio_kscan_it8xxx2_configure()
46 volatile uint8_t *reg_ksi_kso_gpod = config->reg_ksi_kso_gpod; in gpio_kscan_it8xxx2_configure()
47 uint8_t mask = BIT(pin); in gpio_kscan_it8xxx2_configure() local
53 return -ENOTSUP; in gpio_kscan_it8xxx2_configure()
57 *reg_ksi_kso_gctrl |= mask; in gpio_kscan_it8xxx2_configure()
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Dgpio_rv32m1.c6 * SPDX-License-Identifier: Apache-2.0
68 return -EINVAL; in get_port_pcr_irqc_value_from_flags()
79 const struct gpio_rv32m1_config *config = dev->config; in gpio_rv32m1_configure()
80 GPIO_Type *gpio_base = config->gpio_base; in gpio_rv32m1_configure()
81 PORT_Type *port_base = config->port_base; in gpio_rv32m1_configure()
82 uint32_t mask = 0U; in gpio_rv32m1_configure() local
86 if (pin >= ARRAY_SIZE(port_base->PCR)) { in gpio_rv32m1_configure()
87 return -EINVAL; in gpio_rv32m1_configure()
92 return -EINVAL; in gpio_rv32m1_configure()
96 return -ENOTSUP; in gpio_rv32m1_configure()
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Dgpio_mcux.c3 * Copyright 2017, 2023-2024 NXP
5 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/gpio/nxp-kinetis-gpio.h>
38 const struct gpio_mcux_config *config = dev->config; in gpio_mcux_configure()
39 GPIO_Type *gpio_base = config->gpio_base; in gpio_mcux_configure()
40 PORT_Type *port_base = config->port_base; in gpio_mcux_configure()
41 uint32_t mask = 0U; in gpio_mcux_configure() local
45 if (pin >= ARRAY_SIZE(port_base->PCR)) { in gpio_mcux_configure()
46 return -EINVAL; in gpio_mcux_configure()
50 return -ENOTSUP; in gpio_mcux_configure()
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Dgpio_ite_it8xxx2_v2.c4 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
19 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
49 /* Wake up control mask */
80 const struct gpio_ite_cfg *gpio_config = dev->config; in gpio_ite_configure()
81 volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr; in gpio_ite_configure()
82 volatile uint8_t *reg_gpotr = (uint8_t *)gpio_config->reg_gpotr; in gpio_ite_configure()
83 volatile uint8_t *reg_p18scr = (uint8_t *)gpio_config->reg_p18scr; in gpio_ite_configure()
84 volatile uint8_t *reg_gpcr = (uint8_t *)gpio_config->reg_gpcr + pin; in gpio_ite_configure()
85 struct gpio_ite_data *data = dev->data; in gpio_ite_configure()
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Dgpio_ite_it8801.c4 * SPDX-License-Identifier: Apache-2.0
47 const struct gpio_it8801_config *config = dev->config; in ioex_check_is_not_valid()
49 if (BIT(pin) & ~(config->pin_mask)) { in ioex_check_is_not_valid()
50 LOG_ERR("GPIO port%d-%d is not support", config->reg_ipsr, pin); in ioex_check_is_not_valid()
51 return -ENOTSUP; in ioex_check_is_not_valid()
59 const struct gpio_it8801_config *config = dev->config; in gpio_it8801_configure()
61 uint8_t reg_gpcr = config->reg_gpcr + pin; in gpio_it8801_configure()
62 uint8_t mask = BIT(pin); in gpio_it8801_configure() local
67 return -ENOTSUP; in gpio_it8801_configure()
71 return -ENOTSUP; in gpio_it8801_configure()
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Dgpio_mchp_xec.c4 * SPDX-License-Identifier: Apache-2.0
21 ((__IO uint32_t *)(GPIO_PARIN_BASE + (config->port_num << 2)))
24 ((__IO uint32_t *)(GPIO_PAROUT_BASE + (config->port_num << 2)))
52 * notes: The GPIO parallel output bits are read-only until the
53 * Alternate-Output-Disable (AOD) bit is set in the pin's control
65 const struct gpio_xec_config *config = dev->config; in gpio_xec_configure()
68 uint32_t mask = 0U; in gpio_xec_configure() local
71 if ((valid_ctrl_masks[config->port_num] & BIT(pin)) == 0U) { in gpio_xec_configure()
72 return -EINVAL; in gpio_xec_configure()
78 return -ENOTSUP; in gpio_xec_configure()
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Dgpio_esp32.c5 * SPDX-License-Identifier: Apache-2.0
10 /* Include esp-idf headers first to avoid redefining BIT() macro */
22 #include <zephyr/dt-bindings/gpio/espressif-esp32-gpio.h>
65 #define CPU_ID() arch_curr_cpu()->id
110 const struct gpio_esp32_config *const cfg = dev->config; in gpio_esp32_config()
111 uint32_t io_pin = (uint32_t) pin + ((cfg->gpio_port == 1 && pin < 32) ? 32 : 0); in gpio_esp32_config()
117 return -EINVAL; in gpio_esp32_config()
130 ret = -EINVAL; in gpio_esp32_config()
144 if (rtc_io_desc[rtcio_num].pullup) { in gpio_esp32_config()
147 ret = -ENOTSUP; in gpio_esp32_config()
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Dgpio_mcux_igpio.c4 * SPDX-License-Identifier: Apache-2.0
23 #define DEV_CFG(_dev) ((const struct mcux_igpio_config *)(_dev)->config)
24 #define DEV_DATA(_dev) ((struct mcux_igpio_data *)(_dev)->data)
54 const struct mcux_igpio_config *config = dev->config; in mcux_igpio_configure()
61 if ((config->common.port_pin_mask & BIT(pin)) == 0) { in mcux_igpio_configure()
62 return -ENOTSUP; in mcux_igpio_configure()
65 /* Some SOCs have non-contiguous gpio pin layouts, account for this */ in mcux_igpio_configure()
67 if ((config->common.port_pin_mask & BIT(i)) == 0) { in mcux_igpio_configure()
68 cfg_idx--; in mcux_igpio_configure()
73 if (cfg_idx >= config->mux_count) { in mcux_igpio_configure()
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Dgpio_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
12 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
57 ((struct gpio_ite_data *)(dev)->data)
60 ((const struct gpio_ite_cfg *)(dev)->config)
63 * Convert wake-up controller (WUC) group to the corresponding wake-up edge
73 * From WUESR1-WUESR4, the address increases by ones. From WUESR5 on in wuesr()
77 (volatile uint8_t *)(IT8XXX2_WUC_WUESR1 + grp-1) : in wuesr()
78 (volatile uint8_t *)(IT8XXX2_WUC_WUESR5 + 4*(grp-5)); in wuesr()
82 * Convert wake-up controller (WUC) group to the corresponding wake-up edge
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/Zephyr-latest/dts/bindings/pinctrl/
Dite,it8xxx2-pinctrl-func.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "ite,it8xxx2-pinctrl-func"
11 func3-gcr:
14 func3-en-mask:
17 func3-ext:
21 the setting of func3-gcr, some pins require external setting.
23 func3-ext-mask:
26 func4-gcr:
29 func4-en-mask:
32 volt-sel:
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/Zephyr-latest/dts/riscv/ite/
Dit81xx2.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 gpiogcr: gpio-gcr@f01600 {
12 compatible = "ite,it8xxx2-gpiogcr";
17 compatible = "ite,it8xxx2-gpiokscan";
23 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod";
25 gpio-controller;
26 #gpio-cells = <2>;
30 compatible = "ite,it8xxx2-gpiokscan";
36 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod";
38 gpio-controller;
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Dit82xx2.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 compatible = "mmio-sram";
16 intc: interrupt-controller@f03f00 {
17 compatible = "ite,it8xxx2-intc-v2";
18 #address-cells = <0>;
19 #interrupt-cells = <2>;
20 interrupt-controller;
25 compatible = "ite,it8xxx2-watchdog";
29 interrupt-parent = <&intc>;
32 gpiogcr: gpio-gcr@f03e00 {
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/Zephyr-latest/drivers/pinctrl/
Dpinctrl_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
28 /* function 3 enable mask */
32 /* function 3 external mask */
36 /* function 4 enable mask */
40 /* Input voltage selection mask */
53 * KSO push-pull/open-drain bit of KSO[15:0] control register
58 * KSI/KSO pullup bit of KSI[7:0]/KSO[15:0] control register
74 const struct pinctrl_it8xxx2_config *pinctrl_config = pins->pinctrls->config; in pinctrl_it8xxx2_set()
75 const struct pinctrl_it8xxx2_gpio *gpio = &(pinctrl_config->gpio); in pinctrl_it8xxx2_set()
76 uint32_t pincfg = pins->pincfg; in pinctrl_it8xxx2_set()
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/Zephyr-latest/drivers/sdhc/
Dimx_usdhc.c4 * SPDX-License-Identifier: Apache-2.0
101 struct usdhc_data *data = dev->data; in transfer_complete_cb()
104 data->transfer_status |= TRANSFER_DATA_FAILED; in transfer_complete_cb()
106 data->transfer_status |= TRANSFER_DATA_COMPLETE; in transfer_complete_cb()
108 data->transfer_status |= TRANSFER_CMD_FAILED; in transfer_complete_cb()
110 data->transfer_status |= TRANSFER_CMD_COMPLETE; in transfer_complete_cb()
112 k_sem_give(&data->transfer_sem); in transfer_complete_cb()
119 struct usdhc_data *data = dev->data; in sdio_interrupt_cb()
121 if (data->sdhc_cb) { in sdio_interrupt_cb()
122 data->sdhc_cb(dev, SDHC_INT_SDIO, data->sdhc_cb_user_data); in sdio_interrupt_cb()
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/Zephyr-latest/soc/ite/ec/common/
Dchip_chipregs.h3 * SPDX-License-Identifier: Apache-2.0
25 * MASK operation macros
48 /* --- General Control (GCTRL) --- */
52 /* RISC-V JTAG Debug Interface Enable */
54 /* RISC-V JTAG Debug Interface Selection */
67 /* --- External GPIO Control (EGPIO) --- */
265 /* 0x049: PWM Output Open-Drain Enable */
280 /* --- Wake-Up Control (WUC) --- */
284 /* TODO: should a defined interface for configuring wake-up interrupts */
442 * 24-bit timers: external timer 3, 5, and 7
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/Zephyr-latest/doc/releases/
Drelease-notes-3.3.rst14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery)
17 CMSIS-DSP as the default backend.
30 * CVE-2023-0359: Under embargo until 2023-04-20
32 * CVE-2023-0779: Under embargo until 2023-04-22
66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding.
71 * Starting from this release ``zephyr-`` prefixed tags won't be created
82 image states). Use of a truncated hash or non-sha256 hash will still work
88 registration function at boot-up. If applications register this then
93 application code, these will now automatically be registered at boot-up (this
129 This may cause out-of-tree scripts or commands to fail if they have relied
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