6  * SPDX-License-Identifier: Apache-2.0
68 				return -EINVAL;  in get_port_pcr_irqc_value_from_flags()
79 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_configure()
80 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_configure()
81 	PORT_Type *port_base = config->port_base;  in gpio_rv32m1_configure()
82 	uint32_t mask = 0U;  in gpio_rv32m1_configure()  local
86 	if (pin >= ARRAY_SIZE(port_base->PCR)) {  in gpio_rv32m1_configure()
87 		return -EINVAL;  in gpio_rv32m1_configure()
92 		return -EINVAL;  in gpio_rv32m1_configure()
96 		return -ENOTSUP;  in gpio_rv32m1_configure()
100 		return -ENOTSUP;  in gpio_rv32m1_configure()
105 	    ((config->flags & GPIO_INT_ENABLE) == 0U)) {  in gpio_rv32m1_configure()
106 		return -ENOTSUP;  in gpio_rv32m1_configure()
113 	 * 0 - pin is input, 1 - pin is output  in gpio_rv32m1_configure()
118 		gpio_base->PDDR &= ~BIT(pin);  in gpio_rv32m1_configure()
122 			gpio_base->PSOR = BIT(pin);  in gpio_rv32m1_configure()
124 			gpio_base->PCOR = BIT(pin);  in gpio_rv32m1_configure()
126 		gpio_base->PDDR |= BIT(pin);  in gpio_rv32m1_configure()
129 		return -ENOTSUP;  in gpio_rv32m1_configure()
133 	mask |= PORT_PCR_MUX_MASK;  in gpio_rv32m1_configure()
136 	/* Now do the PORT module. Figure out the pullup/pulldown  in gpio_rv32m1_configure()
139 	mask |= PORT_PCR_PE_MASK | PORT_PCR_PS_MASK;  in gpio_rv32m1_configure()
142 		/* Enable the pull and select the pullup resistor. */  in gpio_rv32m1_configure()
147 		 * the pullup resistor.  in gpio_rv32m1_configure()
155 	mask |= PORT_PCR_IRQC_MASK;  in gpio_rv32m1_configure()
158 	port_base->PCR[pin] = (port_base->PCR[pin] & ~mask) | pcr;  in gpio_rv32m1_configure()
165 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_get_raw()
166 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_get_raw()
168 	*value = gpio_base->PDIR;  in gpio_rv32m1_port_get_raw()
174 					   uint32_t mask,  in gpio_rv32m1_port_set_masked_raw()  argument
177 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_set_masked_raw()
178 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_set_masked_raw()
180 	gpio_base->PDOR = (gpio_base->PDOR & ~mask) | (mask & value);  in gpio_rv32m1_port_set_masked_raw()
186 					 uint32_t mask)  in gpio_rv32m1_port_set_bits_raw()  argument
188 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_set_bits_raw()
189 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_set_bits_raw()
191 	gpio_base->PSOR = mask;  in gpio_rv32m1_port_set_bits_raw()
197 					   uint32_t mask)  in gpio_rv32m1_port_clear_bits_raw()  argument
199 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_clear_bits_raw()
200 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_clear_bits_raw()
202 	gpio_base->PCOR = mask;  in gpio_rv32m1_port_clear_bits_raw()
208 					uint32_t mask)  in gpio_rv32m1_port_toggle_bits()  argument
210 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_toggle_bits()
211 	GPIO_Type *gpio_base = config->gpio_base;  in gpio_rv32m1_port_toggle_bits()
213 	gpio_base->PTOR = mask;  in gpio_rv32m1_port_toggle_bits()
223 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_pin_interrupt_configure()
224 	PORT_Type *port_base = config->port_base;  in gpio_rv32m1_pin_interrupt_configure()
227 	if (pin >= ARRAY_SIZE(port_base->PCR)) {  in gpio_rv32m1_pin_interrupt_configure()
228 		return -EINVAL;  in gpio_rv32m1_pin_interrupt_configure()
233 	    ((config->flags & GPIO_INT_ENABLE) == 0U)) {  in gpio_rv32m1_pin_interrupt_configure()
234 		return -ENOTSUP;  in gpio_rv32m1_pin_interrupt_configure()
239 	port_base->PCR[pin] = (port_base->PCR[pin] & ~PORT_PCR_IRQC_MASK) | pcr;  in gpio_rv32m1_pin_interrupt_configure()
249 	struct gpio_rv32m1_data *data = dev->data;  in gpio_rv32m1_manage_callback()
251 	gpio_manage_callback(&data->callbacks, callback, set);  in gpio_rv32m1_manage_callback()
258 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_port_isr()
259 	struct gpio_rv32m1_data *data = dev->data;  in gpio_rv32m1_port_isr()
262 	int_status = config->port_base->ISFR;  in gpio_rv32m1_port_isr()
265 	config->port_base->ISFR = int_status;  in gpio_rv32m1_port_isr()
267 	gpio_fire_callbacks(&data->callbacks, dev, int_status);  in gpio_rv32m1_port_isr()
272 	const struct gpio_rv32m1_config *config = dev->config;  in gpio_rv32m1_init()
275 	if (config->clock_dev) {  in gpio_rv32m1_init()
276 		if (!device_is_ready(config->clock_dev)) {  in gpio_rv32m1_init()
277 			return -ENODEV;  in gpio_rv32m1_init()
280 		ret = clock_control_on(config->clock_dev, config->clock_subsys);  in gpio_rv32m1_init()
286 	return config->irq_config_func(dev);  in gpio_rv32m1_init()