1/* 2 * Copyright (c) 2023 ITE Corporation. All Rights Reserved. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <ite/it8xxx2.dtsi> 8 9/ { 10 soc { 11 gpiogcr: gpio-gcr@f01600 { 12 compatible = "ite,it8xxx2-gpiogcr"; 13 reg = <0x00f01600 0x100>; 14 }; 15 16 gpioksi: gpiokscan@f01d07 { 17 compatible = "ite,it8xxx2-gpiokscan"; 18 reg = <0x00f01d07 1 19 0x00f01d06 1 20 0x00f01d08 1 21 0x00f01d09 1 22 0x00f01d26 1>; 23 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod"; 24 ngpios = <8>; 25 gpio-controller; 26 #gpio-cells = <2>; 27 }; 28 29 gpioksoh: gpiokscan@f01d0b { 30 compatible = "ite,it8xxx2-gpiokscan"; 31 reg = <0x00f01d0b 1 32 0x00f01d0a 1 33 0x00f01d01 1 34 0x00f01d0c 1 35 0x00f01d27 1>; 36 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod"; 37 ngpios = <8>; 38 gpio-controller; 39 #gpio-cells = <2>; 40 }; 41 42 gpioksol: gpiokscan@f01d0e { 43 compatible = "ite,it8xxx2-gpiokscan"; 44 reg = <0x00f01d0e 1 45 0x00f01d0d 1 46 0x00f01d00 1 47 0x00f01d0f 1 48 0x00f01d28 1>; 49 reg-names = "goen", "gctrl", "gdat", "gdmr", "gpod"; 50 ngpios = <8>; 51 gpio-controller; 52 #gpio-cells = <2>; 53 }; 54 55 pinctrl: pin-controller { 56 compatible = "ite,it8xxx2-pinctrl"; 57 #address-cells = <1>; 58 #size-cells = <1>; 59 status = "okay"; 60 }; 61 62 pinctrla: pinctrl@f01610 { 63 compatible = "ite,it8xxx2-pinctrl-func"; 64 reg = <0x00f01610 8 /* GPCR */ 65 NO_FUNC 1>; 66 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 67 0xf02032 0xf02032 0xf016f0 0xf016f0>; 68 func3-en-mask = <0 0 0 0 69 0x02 0x02 0x10 0x0C >; 70 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 71 NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; 72 func4-en-mask = <0 0 0 0 73 0 0 0 0 >; 74 volt-sel = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 75 0xf016e9 0xf016e9 0xf016e9 0xf016e9>; 76 volt-sel-mask = <0 0 0 0 77 0x1 0x02 0x20 0x40 >; 78 #pinmux-cells = <2>; 79 gpio-group; 80 }; 81 82 pinctrlb: pinctrl@f01618 { 83 compatible = "ite,it8xxx2-pinctrl-func"; 84 reg = <0x00f01618 8 /* GPCR */ 85 NO_FUNC 1>; 86 func3-gcr = <0xf016f5 0xf016f5 NO_FUNC NO_FUNC 87 NO_FUNC NO_FUNC NO_FUNC 0xf01600>; 88 func3-en-mask = <0x01 0x02 0 0 89 0 0 0 0x02 >; 90 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 91 NO_FUNC NO_FUNC NO_FUNC 0xf016f1>; 92 func4-en-mask = <0 0 0 0 93 0 0 0 0x40 >; 94 volt-sel = <NO_FUNC NO_FUNC NO_FUNC 0xf016e7 95 0xf016e7 0xf016e4 0xf016e4 0xf016e9>; 96 volt-sel-mask = <0 0 0 0x02 97 0x01 0x80 0x40 0x10 >; 98 #pinmux-cells = <2>; 99 gpio-group; 100 }; 101 102 pinctrlc: pinctrl@f01620 { 103 compatible = "ite,it8xxx2-pinctrl-func"; 104 reg = <0x00f01620 8 /* GPCR */ 105 NO_FUNC 1>; 106 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC 0xf016f0 107 NO_FUNC 0xf016f0 NO_FUNC 0xf016f3>; 108 func3-en-mask = <0 0 0 0x10 109 0 0x10 0 0x02 >; 110 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 111 NO_FUNC NO_FUNC NO_FUNC 0xf016f6>; 112 func4-en-mask = <0 0 0 0 113 0 0 0 0x80 >; 114 volt-sel = <0xf016e7 0xf016e4 0xf016e4 NO_FUNC 115 0xf016e9 NO_FUNC 0xf016e9 0xf016e4>; 116 volt-sel-mask = <0x80 0x20 0x10 0 117 0x04 0 0x08 0x08 >; 118 #pinmux-cells = <2>; 119 gpio-group; 120 }; 121 122 pinctrld: pinctrl@f01628 { 123 compatible = "ite,it8xxx2-pinctrl-func"; 124 reg = <0x00f01628 8 /* GPCR */ 125 NO_FUNC 1>; 126 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 127 NO_FUNC 0xf016f0 NO_FUNC NO_FUNC>; 128 func3-en-mask = <0 0 0 0 129 0 0x02 0 0 >; 130 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 131 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 132 func4-en-mask = <0 0 0 0 133 0 0 0 0 >; 134 volt-sel = <0xf016e4 0xf016e4 0xf016e4 0xf016e5 135 0xf016e5 0xf016e7 0xf016e7 0xf016e7>; 136 volt-sel-mask = <0x04 0x02 0x01 0x80 137 0x40 0x10 0x20 0x40 >; 138 #pinmux-cells = <2>; 139 gpio-group; 140 }; 141 142 pinctrle: pinctrl@f01630 { 143 compatible = "ite,it8xxx2-pinctrl-func"; 144 reg = <0x00f01630 8 /* GPCR */ 145 NO_FUNC 1>; 146 func3-gcr = <0xf02032 NO_FUNC NO_FUNC NO_FUNC 147 NO_FUNC 0xf016f0 NO_FUNC 0xf02032>; 148 func3-en-mask = <0x01 0 0 0 149 0 0x08 0 0x01 >; 150 func4-gcr = <0xf016f3 NO_FUNC NO_FUNC NO_FUNC 151 NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; 152 func4-en-mask = <0x01 0 0 0 153 0 0 0 0 >; 154 volt-sel = <0xf016e5 0xf016d4 0xf016d4 NO_FUNC 155 0xf016e7 0xf016e7 0xf016e5 0xf016e5>; 156 volt-sel-mask = <0x20 0x40 0x80 0 157 0x04 0x08 0x10 0x08 >; 158 #pinmux-cells = <2>; 159 gpio-group; 160 }; 161 162 pinctrlf: pinctrl@f01638 { 163 compatible = "ite,it8xxx2-pinctrl-func"; 164 reg = <0x00f01638 8 /* GPCR */ 165 NO_FUNC 1>; 166 func3-gcr = <NO_FUNC NO_FUNC 0xf016f0 0xf016f0 167 NO_FUNC NO_FUNC 0xf016f1 0xf016f1>; 168 func3-en-mask = <0 0 0x02 0x02 169 0 0 0x10 0x10 >; 170 func4-gcr = <NO_FUNC NO_FUNC 0xf02046 0xf02046 171 NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; 172 func4-en-mask = <0 0 0x40 0x40 173 0 0 0 0 >; 174 volt-sel = <0xf016d4 0xf016d4 0xf016e5 0xf016e5 175 0xf016e5 0xf016e6 0xf016e6 0xf016e6>; 176 volt-sel-mask = <0x10 0x20 0x04 0x02 177 0x01 0x80 0x40 0x20 >; 178 #pinmux-cells = <2>; 179 gpio-group; 180 }; 181 182 pinctrlg: pinctrl@f01640 { 183 compatible = "ite,it8xxx2-pinctrl-func"; 184 reg = <0x00f01640 8 /* GPCR */ 185 NO_FUNC 1>; 186 func3-gcr = <0xf016f0 0xf016f0 0xf016f0 NO_FUNC 187 NO_FUNC NO_FUNC 0xf016f0 NO_FUNC>; 188 func3-en-mask = <0x20 0x08 0x10 0 189 0 0 0x02 0 >; 190 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 191 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 192 func4-en-mask = <0 0 0 0 193 0 0 0 0 >; 194 volt-sel = <0xf016d4 0xf016e6 0xf016d4 NO_FUNC 195 NO_FUNC NO_FUNC 0xf016e6 NO_FUNC>; 196 volt-sel-mask = <0x04 0x10 0x08 0 197 0 0 0x08 0 >; 198 #pinmux-cells = <2>; 199 gpio-group; 200 }; 201 202 pinctrlh: pinctrl@f01648 { 203 compatible = "ite,it8xxx2-pinctrl-func"; 204 reg = <0x00f01648 8 /* GPCR */ 205 NO_FUNC 1>; 206 func3-gcr = <NO_FUNC 0xf016f1 0xf016f1 NO_FUNC 207 NO_FUNC 0xf016f5 0xf016f5 NO_FUNC>; 208 func3-en-mask = <0 0x20 0x20 0 209 0 0x04 0x08 0 >; 210 func3-ext = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 211 NO_FUNC 0xf03a23 0xf03a23 NO_FUNC>; 212 func3-ext-mask = <0 0 0 0 213 0 0x01 0x01 0 >; 214 func4-gcr = <NO_FUNC 0xf016f5 0xf016f5 NO_FUNC 215 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 216 func4-en-mask = <0 0x04 0x08 0 217 0 0 0 0 >; 218 volt-sel = <0xf016e6 0xf016e6 0xf016e6 NO_FUNC 219 NO_FUNC 0xf016d3 0xf016d4 NO_FUNC>; 220 volt-sel-mask = <0x04 0x02 0x01 0 221 0 0x80 0x01 0 >; 222 #pinmux-cells = <2>; 223 gpio-group; 224 }; 225 226 pinctrli: pinctrl@f01650 { 227 compatible = "ite,it8xxx2-pinctrl-func"; 228 reg = <0x00f01650 8 /* GPCR */ 229 NO_FUNC 1>; 230 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 231 NO_FUNC 0xf016f0 0xf016f0 0xf016f0>; 232 func3-en-mask = <0 0 0 0 233 0 0x08 0x08 0x08 >; 234 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 235 NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; 236 func4-en-mask = <0 0 0 0 237 0 0 0 0 >; 238 volt-sel = <0xf016d3 0xf016e8 0xf016e8 0xf016e8 239 0xf016e8 0xf016d3 0xf016d3 0xf016d3>; 240 volt-sel-mask = <0x08 0x10 0x20 0x40 241 0x80 0x10 0x20 0x40 >; 242 #pinmux-cells = <2>; 243 gpio-group; 244 }; 245 246 pinctrlj: pinctrl@f01658 { 247 compatible = "ite,it8xxx2-pinctrl-func"; 248 reg = <0x00f01658 8 /* GPCR */ 249 NO_FUNC 1>; 250 func3-gcr = <0xf016f4 NO_FUNC 0xf016f4 0xf016f4 251 0xf016f0 0xf016f0 NO_FUNC NO_FUNC>; 252 func3-en-mask = <0x01 0 0x01 0x02 253 0x02 0x03 0 0 >; 254 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 255 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 256 func4-en-mask = <0 0 0 0 257 0 0 0 0 >; 258 volt-sel = <0xf016e8 0xf016e8 0xf016e8 0xf016e8 259 0xf016d3 0xf016d3 0xf016d3 0xf016d7>; 260 volt-sel-mask = <0x01 0x02 0x04 0x08 261 0x01 0x02 0x04 0x04 >; 262 #pinmux-cells = <2>; 263 gpio-group; 264 }; 265 266 pinctrlk: pinctrl@f01690 { 267 compatible = "ite,it8xxx2-pinctrl-func"; 268 reg = <0x00f01690 8 /* GPCR */ 269 NO_FUNC 1>; 270 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 271 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 272 func3-en-mask = <0 0 0 0 273 0 0 0 0 >; 274 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 275 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 276 func4-en-mask = <0 0 0 0 277 0 0 0 0 >; 278 volt-sel = <0xf016d2 0xf016d2 0xf016d2 0xf016d2 279 0xf016d2 0xf016d2 0xf016d2 0xf016d2>; 280 volt-sel-mask = <0x01 0x02 0x04 0x08 281 0x10 0x20 0x40 0x80 >; 282 #pinmux-cells = <2>; 283 gpio-group; 284 }; 285 286 pinctrll: pinctrl@f01698 { 287 compatible = "ite,it8xxx2-pinctrl-func"; 288 reg = <0x00f01698 8 /* GPCR */ 289 NO_FUNC 1>; 290 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 291 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 292 func3-en-mask = <0 0 0 0 293 0 0 0 0 >; 294 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 295 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 296 func4-en-mask = <0 0 0 0 297 0 0 0 0 >; 298 volt-sel = <0xf016d1 0xf016d1 0xf016d1 0xf016d1 299 0xf016d1 0xf016d1 0xf016d1 0xf016d1>; 300 volt-sel-mask = <0x01 0x02 0x04 0x08 301 0x10 0x20 0x40 0x80 >; 302 #pinmux-cells = <2>; 303 gpio-group; 304 }; 305 306 pinctrlm: pinctrl@f016a0 { 307 compatible = "ite,it8xxx2-pinctrl-func"; 308 reg = <0x00f016a0 8 /* GPCR */ 309 NO_FUNC 1>; 310 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 311 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 312 func3-en-mask = <0 0 0 0 313 0 0 0 0 >; 314 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC 315 NO_FUNC NO_FUNC NO_FUNC NO_FUNC>; 316 func4-en-mask = <0 0 0 0 317 0 0 0 0 >; 318 volt-sel = <0xf016ed 0xf016ed 0xf016ed 0xf016ed 319 0xf016ed 0xf016ed 0xf016ed NO_FUNC >; 320 volt-sel-mask = <0x10 0x10 0x10 0x10 321 0x10 0x10 0x10 0 >; 322 #pinmux-cells = <2>; 323 gpio-group; 324 }; 325 326 pinctrlksi: pinctrl@f01d06 { 327 compatible = "ite,it8xxx2-pinctrl-func"; 328 reg = <0x00f01d06 1 /* KSIGCTRL */ 329 0x00f01d05 1>; /* KSICTRL */ 330 pp-od-mask = <NO_FUNC>; 331 pullup-mask = <BIT(2)>; 332 #pinmux-cells = <2>; 333 }; 334 335 pinctrlksoh: pinctrl@f01d0a { 336 compatible = "ite,it8xxx2-pinctrl-func"; 337 reg = <0x00f01d0a 1 /* KSOHGCTRL */ 338 0x00f01d02 1>; /* KSOCTRL */ 339 pp-od-mask = <BIT(0)>; 340 pullup-mask = <BIT(2)>; 341 #pinmux-cells = <2>; 342 }; 343 344 pinctrlksol: pinctrl@f01d0d { 345 compatible = "ite,it8xxx2-pinctrl-func"; 346 reg = <0x00f01d0d 1 /* KSOLGCTRL */ 347 0x00f01d02 1>; /* KSOCTRL */ 348 pp-od-mask = <BIT(0)>; 349 pullup-mask = <BIT(2)>; 350 #pinmux-cells = <2>; 351 }; 352 353 i2c0: i2c@f01c40 { 354 compatible = "ite,it8xxx2-i2c"; 355 #address-cells = <1>; 356 #size-cells = <0>; 357 reg = <0x00f01c40 0x0040 /* Base address */ 358 0x00f01c0d 0x0001>; /* MSTFCTRL1 */ 359 interrupts = <IT8XXX2_IRQ_SMB_A IRQ_TYPE_LEVEL_HIGH>; 360 interrupt-parent = <&intc>; 361 status = "disabled"; 362 port-num = <SMB_CHANNEL_A>; 363 channel-switch-sel = <I2C_CHA_LOCATE>; 364 scl-gpios = <&gpiob 3 0>; 365 sda-gpios = <&gpiob 4 0>; 366 clock-gate-offset = <CGC_OFFSET_SMBA>; 367 fifo-enable; /* FIFO1 */ 368 }; 369 370 i2c1: i2c@f01c80 { 371 compatible = "ite,it8xxx2-i2c"; 372 #address-cells = <1>; 373 #size-cells = <0>; 374 reg = <0x00f01c80 0x0040 /* Base address */ 375 0x00f01c0f 0x0001>; /* MSTFCTRL2 */ 376 interrupts = <IT8XXX2_IRQ_SMB_B IRQ_TYPE_LEVEL_HIGH>; 377 interrupt-parent = <&intc>; 378 status = "disabled"; 379 port-num = <SMB_CHANNEL_B>; 380 channel-switch-sel = <I2C_CHB_LOCATE>; 381 scl-gpios = <&gpioc 1 0>; 382 sda-gpios = <&gpioc 2 0>; 383 clock-gate-offset = <CGC_OFFSET_SMBB>; 384 fifo-enable; /* FIFO2 */ 385 }; 386 387 i2c2: i2c@f01cc0 { 388 compatible = "ite,it8xxx2-i2c"; 389 #address-cells = <1>; 390 #size-cells = <0>; 391 reg = <0x00f01cc0 0x0040 /* Base address */ 392 0x00f01c0f 0x0001>; /* MSTFCTRL2 */ 393 interrupts = <IT8XXX2_IRQ_SMB_C IRQ_TYPE_LEVEL_HIGH>; 394 interrupt-parent = <&intc>; 395 status = "disabled"; 396 port-num = <SMB_CHANNEL_C>; 397 channel-switch-sel = <I2C_CHC_LOCATE>; 398 scl-gpios = <&gpiof 6 0>; 399 sda-gpios = <&gpiof 7 0>; 400 clock-gate-offset = <CGC_OFFSET_SMBC>; 401 /delete-property/ fifo-enable; /* FIFO2 */ 402 }; 403 404 i2c3: i2c@f03680 { 405 compatible = "ite,enhance-i2c"; 406 #address-cells = <1>; 407 #size-cells = <0>; 408 reg = <0x00f03680 0x0080>; 409 interrupts = <IT8XXX2_IRQ_SMB_D IRQ_TYPE_LEVEL_HIGH>; 410 interrupt-parent = <&intc>; 411 status = "disabled"; 412 port-num = <I2C_CHANNEL_D>; 413 channel-switch-sel = <I2C_CHD_LOCATE>; 414 scl-gpios = <&gpioh 1 0>; 415 sda-gpios = <&gpioh 2 0>; 416 clock-gate-offset = <CGC_OFFSET_SMBD>; 417 }; 418 419 i2c4: i2c@f03500 { 420 compatible = "ite,enhance-i2c"; 421 #address-cells = <1>; 422 #size-cells = <0>; 423 reg = <0x00f03500 0x0080>; 424 interrupts = <IT8XXX2_IRQ_SMB_E IRQ_TYPE_LEVEL_HIGH>; 425 interrupt-parent = <&intc>; 426 status = "disabled"; 427 port-num = <I2C_CHANNEL_E>; 428 channel-switch-sel = <I2C_CHE_LOCATE>; 429 scl-gpios = <&gpioe 0 0>; 430 sda-gpios = <&gpioe 7 0>; 431 clock-gate-offset = <CGC_OFFSET_SMBE>; 432 }; 433 434 i2c5: i2c@f03580 { 435 compatible = "ite,enhance-i2c"; 436 #address-cells = <1>; 437 #size-cells = <0>; 438 reg = <0x00f03580 0x0080>; 439 interrupts = <IT8XXX2_IRQ_SMB_F IRQ_TYPE_LEVEL_HIGH>; 440 interrupt-parent = <&intc>; 441 status = "disabled"; 442 port-num = <I2C_CHANNEL_F>; 443 channel-switch-sel = <I2C_CHF_LOCATE>; 444 scl-gpios = <&gpioa 4 0>; 445 sda-gpios = <&gpioa 5 0>; 446 clock-gate-offset = <CGC_OFFSET_SMBF>; 447 }; 448 449 wuc1: wakeup-controller@f01b00 { 450 compatible = "ite,it8xxx2-wuc"; 451 reg = <0x00f01b00 1 /* WUEMR1 */ 452 0x00f01b04 1 /* WUESR1 */ 453 0x00f01b08 1 /* WUENR1 */ 454 0x00f01b3c 1>; /* WUBEMR1 */ 455 wakeup-controller; 456 #wuc-cells = <1>; 457 }; 458 459 wuc2: wakeup-controller@f01b01 { 460 compatible = "ite,it8xxx2-wuc"; 461 reg = <0x00f01b01 1 /* WUEMR2 */ 462 0x00f01b05 1 /* WUESR2 */ 463 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR2 */ 464 0x00f01b3d 1>; /* WUBEMR2 */ 465 wakeup-controller; 466 #wuc-cells = <1>; 467 }; 468 469 wuc3: wakeup-controller@f01b02 { 470 compatible = "ite,it8xxx2-wuc"; 471 reg = <0x00f01b02 1 /* WUEMR3 */ 472 0x00f01b06 1 /* WUESR3 */ 473 0x00f01b0a 1 /* WUENR3 */ 474 0x00f01b3e 1>; /* WUBEMR3 */ 475 wakeup-controller; 476 #wuc-cells = <1>; 477 }; 478 479 wuc4: wakeup-controller@f01b03 { 480 compatible = "ite,it8xxx2-wuc"; 481 reg = <0x00f01b03 1 /* WUEMR4 */ 482 0x00f01b07 1 /* WUESR4 */ 483 0x00f01b0b 1 /* WUENR4 */ 484 0x00f01b3f 1>; /* WUBEMR4 */ 485 wakeup-controller; 486 #wuc-cells = <1>; 487 }; 488 489 wuc5: wakeup-controller@f01b0c { 490 compatible = "ite,it8xxx2-wuc"; 491 reg = <0x00f01b0c 1 /* WUEMR5 */ 492 0x00f01b0d 1 /* WUESR5 */ 493 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR5 */ 494 0x00f01b0f 1>; /* WUBEMR5 */ 495 wakeup-controller; 496 #wuc-cells = <1>; 497 }; 498 499 wuc6: wakeup-controller@f01b10 { 500 compatible = "ite,it8xxx2-wuc"; 501 reg = <0x00f01b10 1 /* WUEMR6 */ 502 0x00f01b11 1 /* WUESR6 */ 503 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR6 */ 504 0x00f01b13 1>; /* WUBEMR6 */ 505 wakeup-controller; 506 #wuc-cells = <1>; 507 }; 508 509 wuc7: wakeup-controller@f01b14 { 510 compatible = "ite,it8xxx2-wuc"; 511 reg = <0x00f01b14 1 /* WUEMR7 */ 512 0x00f01b15 1 /* WUESR7 */ 513 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR7 */ 514 0x00f01b17 1>; /* WUBEMR7 */ 515 wakeup-controller; 516 #wuc-cells = <1>; 517 }; 518 519 wuc8: wakeup-controller@f01b18 { 520 compatible = "ite,it8xxx2-wuc"; 521 reg = <0x00f01b18 1 /* WUEMR8 */ 522 0x00f01b19 1 /* WUESR8 */ 523 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR8 */ 524 0x00f01b1b 1>; /* WUBEMR8 */ 525 wakeup-controller; 526 #wuc-cells = <1>; 527 }; 528 529 wuc9: wakeup-controller@f01b1c { 530 compatible = "ite,it8xxx2-wuc"; 531 reg = <0x00f01b1c 1 /* WUEMR9 */ 532 0x00f01b1d 1 /* WUESR9 */ 533 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR9 */ 534 0x00f01b1f 1>; /* WUBEMR9 */ 535 wakeup-controller; 536 #wuc-cells = <1>; 537 }; 538 539 wuc10: wakeup-controller@f01b20 { 540 compatible = "ite,it8xxx2-wuc"; 541 reg = <0x00f01b20 1 /* WUEMR10 */ 542 0x00f01b21 1 /* WUESR10 */ 543 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR10 */ 544 0x00f01b23 1>; /* WUBEMR10 */ 545 wakeup-controller; 546 #wuc-cells = <1>; 547 }; 548 549 wuc11: wakeup-controller@f01b24 { 550 compatible = "ite,it8xxx2-wuc"; 551 reg = <0x00f01b24 1 /* WUEMR11 */ 552 0x00f01b25 1 /* WUESR11 */ 553 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR11 */ 554 0x00f01b27 1>; /* WUBEMR11 */ 555 wakeup-controller; 556 #wuc-cells = <1>; 557 }; 558 559 wuc12: wakeup-controller@f01b28 { 560 compatible = "ite,it8xxx2-wuc"; 561 reg = <0x00f01b28 1 /* WUEMR12 */ 562 0x00f01b29 1 /* WUESR12 */ 563 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR12 */ 564 0x00f01b2b 1>; /* WUBEMR12 */ 565 wakeup-controller; 566 #wuc-cells = <1>; 567 }; 568 569 wuc13: wakeup-controller@f01b2c { 570 compatible = "ite,it8xxx2-wuc"; 571 reg = <0x00f01b2c 1 /* WUEMR13 */ 572 0x00f01b2d 1 /* WUESR13 */ 573 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR13 */ 574 0x00f01b2f 1>; /* WUBEMR13 */ 575 wakeup-controller; 576 #wuc-cells = <1>; 577 }; 578 579 wuc14: wakeup-controller@f01b30 { 580 compatible = "ite,it8xxx2-wuc"; 581 reg = <0x00f01b30 1 /* WUEMR14 */ 582 0x00f01b31 1 /* WUESR14 */ 583 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR14 */ 584 0x00f01b33 1>; /* WUBEMR14 */ 585 wakeup-controller; 586 #wuc-cells = <1>; 587 }; 588 589 wuc15: wakeup-controller@f01b34 { 590 compatible = "ite,it8xxx2-wuc"; 591 reg = <0x00f01b34 1 /* WUEMR15 */ 592 0x00f01b35 1 /* WUESR15 */ 593 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR15 */ 594 0x00f01b37 1>; /* WUBEMR15 */ 595 wakeup-controller; 596 #wuc-cells = <1>; 597 }; 598 599 wuc16: wakeup-controller@f01b38 { 600 compatible = "ite,it8xxx2-wuc"; 601 reg = <0x00f01b38 1 /* WUEMR16 */ 602 0x00f01b39 1 /* WUESR16 */ 603 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR16 */ 604 0x00f01b3b 1>; /* WUBEMR16 */ 605 wakeup-controller; 606 #wuc-cells = <1>; 607 }; 608 609 intc: interrupt-controller@f03f00 { 610 compatible = "ite,it8xxx2-intc"; 611 #address-cells = <0>; 612 #interrupt-cells = <2>; 613 interrupt-controller; 614 reg = <0x00f03f00 0x0100>; 615 }; 616 617 twd0: watchdog@f01f00 { 618 compatible = "ite,it8xxx2-watchdog"; 619 reg = <0x00f01f00 0x000f>; 620 interrupts = <IT8XXX2_IRQ_TIMER1 IRQ_TYPE_EDGE_RISING /* Warning timer */ 621 IT8XXX2_IRQ_TIMER2 IRQ_TYPE_EDGE_RISING>; /* One shot timer */ 622 interrupt-parent = <&intc>; 623 }; 624 625 sha0: sha@f0202d { 626 compatible = "ite,it8xxx2-sha"; 627 reg = <0x00f0202d 0x3>; 628 status = "disabled"; 629 }; 630 631 spi0: spi@f02600 { 632 #address-cells = <1>; 633 #size-cells = <0>; 634 compatible = "ite,it8xxx2-spi"; 635 reg = <0x00f02600 0x34>; 636 interrupt-parent = <&intc>; 637 interrupts = <37 IRQ_TYPE_EDGE_RISING>; 638 status = "disabled"; 639 }; 640 }; 641}; 642 643
