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/Zephyr-latest/dts/bindings/mipi-dbi/
Dnxp,mipi-dbi-flexio-lcdif.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,mipi-dbi-flexio-lcdif"
8 include: [mipi-dbi-controller.yaml, base.yaml, pinctrl-device.yaml]
11 shifters-count:
17 timers-count:
23 enwr-pin:
27 Pin select for WR(8080 mode), EN(6800 mode).
29 rd-pin:
32 Pin select for RD(8080 mode), not used in 6800 mode.
34 data-pin-start:
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/Zephyr-latest/subsys/usb/usb_c/
Dusbc_tc_src_states.c4 * SPDX-License-Identifier: Apache-2.0
38 const struct device *dev = tc->dev; in tc_unattached_src_run()
42 * The SRC.Rd is detected on either CC1 or CC2 pin or in tc_unattached_src_run()
47 if (tcpc_is_cc_at_least_one_rd(tc->cc1, tc->cc2)) { in tc_unattached_src_run()
55 * When in the UnattachedWait.SRC state, the port is discharging the CC pin
62 * 2: The port shall continue to provide an Rp termination on the CC pin not
66 * 3: The port shall provide an Rdch termination on the CC pin being
74 const struct device *dev = tc->dev; in tc_unattached_wait_src_entry()
75 struct usbc_port_data *data = dev->data; in tc_unattached_wait_src_entry() local
76 const struct device *tcpc = data->tcpc; in tc_unattached_wait_src_entry()
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/Zephyr-latest/drivers/stepper/step_dir/
Dstep_dir_stepper_common.c2 * SPDX-FileCopyrightText: Copyright (c) 2024 Fabian Blatz <fabianblatz@gmail.com>
3 * SPDX-License-Identifier: Apache-2.0
13 const struct step_dir_stepper_common_config *config = dev->config; in step_dir_stepper_perform_step()
14 struct step_dir_stepper_common_data *data = dev->data; in step_dir_stepper_perform_step() local
17 switch (data->direction) { in step_dir_stepper_perform_step()
19 ret = gpio_pin_set_dt(&config->dir_pin, 1); in step_dir_stepper_perform_step()
22 ret = gpio_pin_set_dt(&config->dir_pin, 0); in step_dir_stepper_perform_step()
25 LOG_ERR("Unsupported direction: %d", data->direction); in step_dir_stepper_perform_step()
26 return -ENOTSUP; in step_dir_stepper_perform_step()
33 ret = gpio_pin_toggle_dt(&config->step_pin); in step_dir_stepper_perform_step()
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/Zephyr-latest/drivers/gpio/
Dgpio_rt1718s.h4 * SPDX-License-Identifier: Apache-2.0
47 #define RT1718S_REG_GPIO_CTRL(pin) (0xED + pin) argument
59 /* Alert GPIO pin */
65 /* RT1718S chip driver data */
71 /* Alert pin callback */
82 * @param val A pointer to a buffer for the data to return
88 const struct rt1718s_config *const config = (const struct rt1718s_config *)dev->config; in rt1718s_reg_read_byte()
90 return i2c_reg_read_byte_dt(&config->i2c_dev, reg_addr, val); in rt1718s_reg_read_byte()
97 * @param start_addr The register start address
98 * @param buf A pointer to a buffer for the data to return
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Dgpio_gecko.c4 * SPDX-License-Identifier: Apache-2.0
41 #define GET_GECKO_GPIO_INDEX(id) (DT_INST_REG_ADDR(id) - DT_REG_ADDR(DT_NODELABEL(gpioa))) \
48 * See https://www.silabs.com/documents/public/reference-manuals/EFM32WG-RM.pdf
53 * @param[in] pin The index of the pin. Valid values are 0..7.
57 #define GECKO_GPIO_MODEL(pin, mode) (mode << (pin * 4)) argument
61 * @param[in] pin The index of the pin. Valid values are 8..15.
65 #define GECKO_GPIO_MODEH(pin, mode) (mode << ((pin - 8) * 4)) argument
95 static inline void gpio_gecko_add_port(struct gpio_gecko_common_data *data, in gpio_gecko_add_port() argument
99 data->ports[data->count++] = dev; in gpio_gecko_add_port()
103 gpio_pin_t pin, in gpio_gecko_configure() argument
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Dgpio_rv32m1.c6 * SPDX-License-Identifier: Apache-2.0
41 uint32_t pin, in get_port_pcr_irqc_value_from_flags() argument
68 return -EINVAL; in get_port_pcr_irqc_value_from_flags()
77 gpio_pin_t pin, gpio_flags_t flags) in gpio_rv32m1_configure() argument
79 const struct gpio_rv32m1_config *config = dev->config; in gpio_rv32m1_configure()
80 GPIO_Type *gpio_base = config->gpio_base; in gpio_rv32m1_configure()
81 PORT_Type *port_base = config->port_base; in gpio_rv32m1_configure()
85 /* Check for an invalid pin number */ in gpio_rv32m1_configure()
86 if (pin >= ARRAY_SIZE(port_base->PCR)) { in gpio_rv32m1_configure()
87 return -EINVAL; in gpio_rv32m1_configure()
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/Zephyr-latest/drivers/adc/
Dadc_b91.c4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/dt-bindings/adc/b91-adc.h>
28 /* B91 ADC driver data */
46 /* Validate ADC data buffer size */
51 if (sequence->options) { in adc_b91_validate_buffer_size()
52 needed *= (1 + sequence->options->extra_samplings); in adc_b91_validate_buffer_size()
55 if (sequence->buffer_size < needed) { in adc_b91_validate_buffer_size()
56 return -ENOMEM; in adc_b91_validate_buffer_size()
67 if (sequence->channels != BIT(0)) { in adc_b91_validate_sequence()
69 return -ENOTSUP; in adc_b91_validate_sequence()
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Dadc_ads114s0x.c4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/dt-bindings/adc/ads114s0x_adc.h>
85 FIELD_GET(GENMASK(pos + length - 1, pos), value)
87 target &= ~GENMASK(pos + length - 1, pos); \
88 target |= FIELD_PREP(GENMASK(pos + length - 1, pos), value)
356 * - AIN0 as positive input
357 * - AIN1 as negative input
363 * - disable reference monitor
364 * - enable positive reference buffer
365 * - disable negative reference buffer
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/Zephyr-latest/drivers/interrupt_controller/
Dintc_exti_stm32.c2 * Copyright (c) 2016 Open-RnD Sp. z o.o.
4 * Copyright (c) 2019-23 Linaro Limited
6 * SPDX-License-Identifier: Apache-2.0
23 #include <zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h> /* For STM32L0 series */
32 /** Start of the range */
33 uint8_t start; member
40 static IRQn_Type exti_irq_table[NUM_EXTI_LINES] = {[0 ... NUM_EXTI_LINES - 1] = 0xFF};
45 void *data; member
48 /* EXTI driver data */
50 /* per-line callbacks */
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/Zephyr-latest/drivers/smbus/
Dintel_pch_smbus.h7 * PCH provides SMBus 2.0 - compliant Host Controller.
9 * SPDX-License-Identifier: Apache-2.0
17 /* Host Configuration (HCFG) - Offset 40h, 8 bits */
46 #define PCH_SMBUS_HCTL_CMD_BYTE_DATA (2 << 2) /* Byte Data cmd */
47 #define PCH_SMBUS_HCTL_CMD_WORD_DATA (3 << 2) /* Word Data cmd */
58 #define PCH_SMBUS_HCTL_START BIT(6) /* Start SMBUS cmd */
69 /* Set 7-bit address */
75 /* Data 0 Register (HD0) */
76 #define PCH_SMBUS_HD0 0x05 /* Data 0 / Count */
78 /* Data 1 Register (HD1) */
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/Zephyr-latest/drivers/modem/
DKconfig.wncm14a2a4 # SPDX-License-Identifier: Apache-2.0
7 bool "Wistron LTE-M modem driver"
12 Choose this setting to enable Wistron WNC-M14A2A LTE-M modem driver.
13 NOTE: Currently the pin settings only work with FRDM K64F shield.
18 int "Size of the stack for the WNC-M14A2A modem driver RX thread"
24 int "Size of the stack for the WNC-M14A2A modem driver work queue"
27 This stack is used by the work queue to pass off net_pkt data
29 processing data.
40 int "WNC-M14A2A driver init priority"
43 WNC-M14A2A device driver initialization priority.
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DKconfig.ublox-sara-r41 # u-blox SARA R4 driver options
4 # SPDX-License-Identifier: Apache-2.0
7 bool "U-blox SARA modem driver"
15 Choose this setting to enable u-blox SARA-R4 LTE-CatM1/NB-IoT modem
21 bool "u-blox SARA variant selection"
25 bool "u-blox SARA-R4"
27 Enable support for SARA-R4 modem
30 bool "u-blox SARA-U2"
32 Enable support for SARA-U2 modem
37 Enable automatic detection of modem variant (SARA-R4 or SARA-U2)
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/Zephyr-latest/drivers/mdio/
Dmdio_gpio.c4 * SPDX-License-Identifier: Apache-2.0
34 gpio_pin_set_dt(&dev_cfg->mdc_gpio, 1); in mdio_gpio_clock_the_bit()
36 gpio_pin_set_dt(&dev_cfg->mdc_gpio, 0); in mdio_gpio_clock_the_bit()
41 gpio_pin_configure_dt(&dev_cfg->mdio_gpio, dir ? GPIO_OUTPUT_ACTIVE : GPIO_INPUT); in mdio_gpio_dir()
49 uint16_t data = 0; in mdio_gpio_read() local
52 data <<= 1; in mdio_gpio_read()
54 if (gpio_pin_get_dt(&dev_cfg->mdio_gpio) == 1) { in mdio_gpio_read()
55 data |= 1; in mdio_gpio_read()
59 *pdata = data; in mdio_gpio_read()
63 uint32_t data, uint8_t len) in mdio_gpio_write() argument
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/Zephyr-latest/drivers/input/
Dinput_xpt2046.c4 * SPDX-License-Identifier: Apache-2.0
56 #define START BIT(7) macro
64 /* Read all Z1, X, Y, Z2 channels using 16 Clocks-per-Conversion mode.
65 * See the manual https://www.waveshare.com/w/upload/9/98/XPT2046-EN.pdf for details.
66 * Each follow-up command interleaves with previous conversion.
70 [0] = START | CHANNEL(CH_Z1) | POWER_ON,
71 [2] = START | CHANNEL(CH_Z2) | POWER_ON,
72 [4] = START | CHANNEL(CH_X) | POWER_ON,
73 [6] = START | CHANNEL(CH_Y) | POWER_OFF,
78 struct xpt2046_data *data = CONTAINER_OF(cb, struct xpt2046_data, int_gpio_cb); in xpt2046_isr_handler() local
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/Zephyr-latest/dts/bindings/display/
Dultrachip,uc81xx-common.yaml4 # SPDX-License-Identifier: Apache-2.0
8 include: [mipi-dbi-spi-device.yaml, display-controller.yaml]
11 busy-gpios:
12 type: phandle-array
14 description: BUSY pin.
16 The BUSY pin of UC81xx is active low.
17 If connected directly the MCU pin should be configured
21 type: uint8-array
22 description: Booster Soft Start (BTST) values
24 child-binding:
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/Zephyr-latest/subsys/bluetooth/controller/coex/
Dcoex_ticker.c4 * SPDX-License-Identifier: Apache-2.0
48 /* start a secondary one-shot ticker after ticks_delay, in time_slot_delay()
57 ticks_delay, /* one-shot delayed timeout */ in time_slot_delay()
82 const struct coex_ticker_config *config = dev->config; in time_slot_callback_work()
87 /* Read grant pin */ in time_slot_callback_work()
88 if (gpio_pin_get_dt(&config->grant_spec) == 0) { in time_slot_callback_work()
94 /* Schedule another check for grant pin and abort any events scheduled */ in time_slot_callback_work()
104 /* Enable coex pin interrupt */ in time_slot_callback_work()
105 gpio_pin_interrupt_configure_dt(&config->grant_spec, GPIO_INT_EDGE_TO_INACTIVE); in time_slot_callback_work()
133 const struct coex_ticker_config *cfg = dev->config; in coex_ticker_grant_start()
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/Zephyr-latest/drivers/sensor/nuvoton/nuvoton_tach_npcx/
Dtach_nuvoton_npcx.c4 * SPDX-License-Identifier: Apache-2.0
19 * | | +-----------+ TA Pin
20 * +-----------+ | +-----+-----+ | _ _ | |
21 * APB_CLK-->| Prescaler |--->|---+--->| Counter 1 |<--| _| |_| |_ |<--+
22 * +-----------+ | | +-----------+ +-----------+
25 * LFCLK--------------------->| | +-----------+ TB Pin
26 * | +-----+-----+ | _ _ | |
27 * |---+--->| Counter 2 |<--| _| |_| |_ |<--+
28 * | | +-----------+ +-----------+
32 * +----------
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/Zephyr-latest/dts/bindings/gpio/
Dadi,max22190-gpio.yaml3 # SPDX-License-Identifier: Apache-2.0
10 filter-wbes = <CH0 CH1 CH2 ... CH7 > for wire break
12 filter-fbps and filter-delays.
16 pinctrl-names = "default";
18 compatible = "adi,max22190-gpio";
21 spi-max-frequency = <1000000>;
24 gpio-controller;
25 #gpio-cells = <2>;
29 max22190-mode = <1>; // modes range from 0-4
31 drdy-gpios = <&gpioj 12 GPIO_ACTIVE_LOW>; /* SDP-GPIO5 - PMOD-PIN8 */
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Dadi,max14906-gpio.yaml3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "adi,max14906-gpio"
10 "#gpio-cells":
17 drdy-gpios:
19 High-Side Open-Drain Output. READY is passive low when the internal
22 type: phandle-array
23 fault-gpios:
25 Fault pin indicates when there is Fault state in either FAULT1 or FAULT2
27 type: phandle-array
28 sync-gpios:
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Dadi,max14916-gpio.yaml3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "adi,max14916-gpio"
10 "#gpio-cells":
17 drdy-gpios:
19 High-Side Open-Drain Output. READY is passive low when the internal
22 type: phandle-array
23 fault-gpios:
25 Fault pin indicates when there is Fault state in either FAULT1 or FAULT2
27 type: phandle-array
28 sync-gpios:
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/Zephyr-latest/samples/bluetooth/peripheral_hr/src/
Dmain.c1 /* main.c - Application main entry point */
5 * Copyright (c) 2015-2016 Intel Corporation
7 * SPDX-License-Identifier: Apache-2.0
30 BT_DATA(BT_DATA_NAME_COMPLETE, CONFIG_BT_DEVICE_NAME, sizeof(CONFIG_BT_DEVICE_NAME) - 1),
36 BT_DATA(BT_DATA_NAME_COMPLETE, CONFIG_BT_DEVICE_NAME, sizeof(CONFIG_BT_DEVICE_NAME) - 1),
98 battery_level--; in bas_notify()
138 gpio_pin_set(led.port, led.pin, (int)led_is_on); in blink_timeout()
150 return -EIO; in blink_setup()
154 printk("Configuring GPIO pin..."); in blink_setup()
158 return -EIO; in blink_setup()
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/Zephyr-latest/boards/nxp/s32z2xxdc2/support/
Dstartup.cmm3 ; SPDX-License-Identifier: Apache-2.0 *
5 ; Lauterbach Trace32 start-up script for S32Z27x / Cortex-R52 *
8 ; - command operation to execute *
11 ; - elfFile filepath of ELF to load *
12 ; - rtu Real-Time Unit (RTU) index *
15 ; - core core index, relative to the RTU *
18 ; - lockstep set to "yes" to start the core in lock-step mode *
20 ; - Core0 and Core2 (redundancy) operate as a lockstep pair *
21 ; - Core1 and Core3 (redundancy) operate as a lockstep pair *
59 ; select lock-step or split-lock mode (CFG_CORE.SPLT_LCK bit)
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/Zephyr-latest/drivers/pwm/
Dpwm_renesas_ra.c4 * SPDX-License-Identifier: Apache-2.0
73 gpt_extended_cfg_t *p_extend = (gpt_extended_cfg_t *)p_cfg->p_extend; in pwm_renesas_ra_apply_gtior_config()
74 uint32_t gtior = p_extend->gtior_setting.gtior; in pwm_renesas_ra_apply_gtior_config()
79 if (p_extend->gtior_setting.gtior == 0) { in pwm_renesas_ra_apply_gtior_config()
81 if (p_extend->gtioca.output_enabled) { in pwm_renesas_ra_apply_gtior_config()
83 pwm_renesas_ra_gtior_calculate(p_extend->gtioca.stop_level); in pwm_renesas_ra_apply_gtior_config()
88 if (p_extend->gtiocb.output_enabled) { in pwm_renesas_ra_apply_gtior_config()
90 pwm_renesas_ra_gtior_calculate(p_extend->gtiocb.stop_level); in pwm_renesas_ra_apply_gtior_config()
98 gpt_extended_pwm_cfg_t const *p_pwm_cfg = p_extend->p_pwm_cfg; in pwm_renesas_ra_apply_gtior_config()
102 if (p_extend->gtior_setting.gtior == 0) { in pwm_renesas_ra_apply_gtior_config()
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/Zephyr-latest/drivers/dp/
Dswdp_bitbang.c2 * Copyright (c) 2018-2019 PHYTEC Messtechnik GmbH
5 * SPDX-License-Identifier: Apache-2.0
9 * This file is based on SW_DP.c from CMSIS-DAP Source (Revision: V2.0.0)
10 * https://github.com/ARM-software/CMSIS_5/tree/develop/CMSIS/DAP/Firmware
11 * Copyright (c) 2013-2017, ARM Limited, All Rights Reserved
12 * SPDX-License-Identifier: Apache-2.0
16 /* Serial Wire Debug Port interface bit-bang driver */
64 * add start bit, stop bit(6), park bit and parity bit.
69 * - CMSIS-DAP Command Specification, DAP_Transfer
70 * - ARM Debug Interface v5 Architecture Specification
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/Zephyr-latest/drivers/wifi/infineon/
Dairoc_whd_hal_spi.c4 * SPDX-License-Identifier: Apache-2.0
40 struct airoc_wifi_data *data = dev->data; in airoc_wifi_init_primary() local
41 const struct airoc_wifi_config *config = dev->config; in airoc_wifi_init_primary()
49 .host_oob_pin = (void *)&config->wifi_host_wake_gpio, in airoc_wifi_init_primary()
57 data->prev_irq_state = 0; in airoc_wifi_init_primary()
61 gpio_pin_configure_dt(&config->bus_select_gpio, GPIO_OUTPUT_INACTIVE); in airoc_wifi_init_primary()
65 return -ENODEV; in airoc_wifi_init_primary()
68 if (!spi_is_ready_dt(&config->bus_dev.bus_spi)) { in airoc_wifi_init_primary()
70 return -ENODEV; in airoc_wifi_init_primary()
74 cy_rslt_t whd_ret = whd_init(&data->whd_drv, &init_config_default, in airoc_wifi_init_primary()
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