1# Copyright (c) 2024 Analog Devices Inc. 2# Copyright (c) 2024 BayLibre SAS 3# SPDX-License-Identifier: Apache-2.0 4 5description: | 6 ADI MAX22190 octal industrial Input with advanced diagnostic 7 capabilities like Wire break and over/under volatage. 8 Fiter configuration could be done on per channel bases, which 9 mean WB functionality and filters could be set. Reffering to: 10 filter-wbes = <CH0 CH1 CH2 ... CH7 > for wire break 11 To enable wire break set 1 else 0. Same principle is followed for: 12 filter-fbps and filter-delays. 13 Sample binding 14 &sdp_spi { 15 status = "okay"; 16 pinctrl-names = "default"; 17 max22190_gpio0: max22190_gpio@0 { 18 compatible = "adi,max22190-gpio"; 19 reg = <0>; 20 21 spi-max-frequency = <1000000>; 22 status = "okay"; 23 24 gpio-controller; 25 #gpio-cells = <2>; 26 ngpios = <8>; 27 status = "okay"; 28 29 max22190-mode = <1>; // modes range from 0-4 30 31 drdy-gpios = <&gpioj 12 GPIO_ACTIVE_LOW>; /* SDP-GPIO5 - PMOD-PIN8 */ 32 fault-gpios = <&gpioc 11 GPIO_ACTIVE_LOW>; /* SDP-SERIAL_INT - PMOD-PIN7 */ 33 latch-gpios = <&gpioj 13 GPIO_ACTIVE_LOW>; /* SDP-GPIO6 - PMOD-PIN9 */ 34 35 filter-wbes = <1 0 0 0 0 0 0 0>; // wirebreak WBEx 36 filter-fbps = <0 0 0 0 0 0 0 0>; // programmable filter INx 37 filter-delays = <50 100 400 800 1600 3200 12800 20000>; // 1000 us == 1ms 38 }; 39 }; 40 41compatible: "adi,max22190-gpio" 42 43properties: 44 "#gpio-cells": 45 const: 2 46 ngpios: 47 type: int 48 required: true 49 const: 8 50 description: Number of gpios supported 51 drdy-gpios: 52 description: Ready pin which show when chip is ready 53 type: phandle-array 54 fault-gpios: 55 description: | 56 Fault pin indicates when there is Fault state in either FAULT1 or FAULT2 57 bothe of which are cleaned on read once problem is not persistent 58 type: phandle-array 59 latch-gpios: 60 description: | 61 Latch the data so it could be read (partially duplicate CS) 62 type: phandle-array 63 max22190-mode: 64 type: int 65 required: true 66 enum: 67 - 0 68 - 1 69 - 2 70 - 3 71 description: | 72 Default mode set to 1, because in MAX22190PMB devkit this is hardwired 73 mode set by manufacturer. 74 max22190 mode is configured from M0 and M1 pins with 75 pull up or down resistors. 76 MODE| M1| M0| FRAME | CRC | DAISY CHAIN 77 ----+---+---+--------+-----+------------ 78 0 | 0 | 0 | 24-bit | yes | no 79 1 | 0 | 1 | 16-bit | no | no 80 2 | 1 | 0 | 24-bit | yes | yes 81 3 | 1 | 1 | 16-bit | no | yes 82 filter-wbes: 83 type: array 84 default: [0, 0, 0, 0, 0, 0, 0, 0] 85 description: | 86 The default value corresponds to the default value of the hardware. 87 Wire break is disabled in all channels. 88 WBE bit in all Filter registers stand for wire break enable on each 89 channel, so to enable WB functionality set 1. 90 If WB on specific channel is disabled , FAULT will not be rised in case 91 wire is cut. 92 - 1 wire break enable 93 - 0 wire break disable 94 channels indentation start from CH0...CH7 95 filter-fbps: 96 type: array 97 default: [1, 1, 1, 1, 1, 1, 1, 1] 98 description: | 99 The default value corresponds to the default value of the hardware. 100 All channels are in bypass. 101 Enable or disable filter 102 - 1 mean bypass 103 - 0 mean filter is used 104 channels indentation start from CH0...CH7 105 filter-delays: 106 type: array 107 default: [50, 50, 50, 50, 50, 50, 50, 50] 108 description: | 109 The default value corresponds to the default value of the hardware. 110 Used to setup filter delay. Values are set in us. Default value is 50 = 50 us. 111 Value : 50, 100, 400, 800, 1600, 3200, 12800, 20000 112 channels indentation start from CH0...CH7 113 114gpio-cells: 115 - pin 116 - flags 117 118include: [gpio-controller.yaml, spi-device.yaml] 119