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/Zephyr-Core-3.5.0/dts/bindings/sound/
Dcirrus,cs47l63.yaml59 gpio8-gpios:
62 GPIO8 input with bus-keeper
/Zephyr-Core-3.5.0/dts/bindings/gpio/
Draspberrypi,pico-header.yaml21 8 GPIO8 RUN -
Draspberrypi-40pins-header.yaml22 14 GPIO11/SPI0_SCLK GPIO8/SPI0_CE0 15
Dnuvoton,npcx-gpio.yaml27 For example the WUI mapping on NPCX7 GPIO8 would be
/Zephyr-Core-3.5.0/boards/riscv/icev_wireless/
Dicev_wireless-pinctrl.dtsi39 /* Note: external 10k pull-ups on GPIO2 and GPIO8 */
/Zephyr-Core-3.5.0/dts/arm/nxp/
Dnxp_rt1064.dtsi244 &gpio8{
Dnxp_rt1040.dtsi237 &gpio8{
Dnxp_rt1060.dtsi266 &gpio8{
Dnxp_rt11xx_cm4.dtsi495 &gpio8{
Dnxp_rt11xx_cm7.dtsi584 &gpio8{
Dnxp_rt10xx.dtsi364 gpio8: gpio@42008000 { label
Dnxp_rt11xx.dtsi218 gpio8: gpio@40c60000 { label
/Zephyr-Core-3.5.0/dts/arm/nuvoton/npcx/
Dnpcx7.dtsi173 gpio8: gpio@40091000 { label
Dnpcx9.dtsi194 gpio8: gpio@40091000 { label
Dnpcx4.dtsi195 gpio8: gpio@40091000 { label
Dnpcx.dtsi211 gpio8: gpio@40091000 { label
/Zephyr-Core-3.5.0/drivers/ieee802154/
Dieee802154_dw1000_regs.h915 /* Mode Selection for IRQ/GPIO8 */
953 /* GPIO8 */
972 /* Mask for GPIO8. (See GDM0). */
994 /* Direction Selection for GPIO8 */
1013 /* Mask for setting the direction of GPIO8. (See GDM0). */
1149 /* This bit reflects the raw state of GPIO0 .. GPIO8 */
/Zephyr-Core-3.5.0/boards/arm/mimxrt1062_fmurt6/
Dmimxrt1062_fmurt6.dts167 &gpio8 {
/Zephyr-Core-3.5.0/boards/arm/vmu_rt1170/
Dvmu_rt1170.dts152 &gpio8 {
/Zephyr-Core-3.5.0/boards/riscv/icev_wireless/doc/
Dindex.rst81 The J3 pins are 4V, 3.3V, NRST, GPIO2, GPIO3, GPIO8, GPIO9, GPIO10, GPIO20,
/Zephyr-Core-3.5.0/boards/xtensa/esp_wrover_kit/doc/
Dindex.rst286 | 3 | SD1 / GPIO8 |
/Zephyr-Core-3.5.0/doc/releases/
Drelease-notes-3.1.rst1731 * :github:`43292` - NXP RT11xx devicetree missing GPIO7, GPIO8, GPIO12