| /Zephyr-latest/dts/bindings/clock/ |
| D | nuvoton,npcx-pcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 High-Frequency Clock Generator (HFCG), is the source clock of Cortex-M4 core
14 clock-frequency = <DT_FREQ_M(100)>; /* OFMCLK runs at 100MHz */
15 core-prescaler = <5>; /* CORE_CLK runs at 20MHz */
16 apb1-prescaler = <5>; /* APB1_CLK runs at 20MHz */
17 apb2-prescaler = <5>; /* APB2_CLK runs at 20MHz */
18 apb3-prescaler = <5>; /* APB3_CLK runs at 20MHz */
21 compatible: "nuvoton,npcx-pcc"
23 include: [clock-controller.yaml, base.yaml]
29 clock-frequency:
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| D | nuvoton,npcm-pcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 High-Frequency Clock Generator (HFCG), is the source clock of Cortex-M4 core
14 clock-frequency = <DT_FREQ_M(96)>; /* OFMCLK runs at 96MHz */
15 core-prescaler = <1>; /* CORE_CLK runs at 96MHz */
16 apb1-prescaler = <8>; /* APB1_CLK runs at 12MHz */
17 apb2-prescaler = <1>; /* APB2_CLK runs at 96MHz */
18 apb3-prescaler = <1>; /* APB3_CLK runs at 96MHz */
19 apb6-prescaler = <1>; /* APB6_CLK runs at 96MHz */
20 fiu-prescaler = <1>; /* FIU_CLK runs at 96MHz */
21 i3c-prescaler = <1>; /* I3C_CLK runs at 96MHz */
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| /Zephyr-latest/samples/modules/cmsis_dsp/moving_average/ |
| D | sample.yaml | 7 - samples
9 - qemu_cortex_m0
10 - native_sim
12 - cmsis-dsp
17 - "Input\\[00\\]: 0 0 0 0 0 0 0 0 0 0 | Output\\[00\\]: 0.00"
18 - "Input\\[01\\]: 0 0 0 0 0 0 0 0 0 1 | Output\\[01\\]: 0.10"
19 - "Input\\[02\\]: 0 0 0 0 0 0 0 0 1 2 | Output\\[02\\]: 0.30"
20 - "Input\\[03\\]: 0 0 0 0 0 0 0 1 2 3 | Output\\[03\\]: 0.60"
21 - "Input\\[04\\]: 0 0 0 0 0 0 1 2 3 4 | Output\\[04\\]: 1.00"
22 - "Input\\[05\\]: 0 0 0 0 0 1 2 3 4 5 | Output\\[05\\]: 1.50"
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| /Zephyr-latest/tests/ztest/zexpect/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
19 uint32_t val = 5; in ZTEST()
22 zexpect_not_equal(val, 5); in ZTEST()
59 zexpect_ok(5); in ZTEST()
64 zexpect_not_ok(-EIO); in ZTEST()
103 zexpect_equal(5, 5); in ZTEST()
109 zexpect_equal(5, 1); in ZTEST()
114 zexpect_not_equal(5, 1); in ZTEST()
120 zexpect_not_equal(5, 5); in ZTEST()
144 zexpect_within(7, 5, 2); in ZTEST()
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| /Zephyr-latest/dts/bindings/interrupt-controller/ |
| D | st,stm32-exti.yaml | 3 compatible: "st,stm32-exti"
5 include: [base.yaml, interrupt-controller.yaml]
14 interrupt-names:
17 num-lines:
22 line-ranges:
31 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
32 <4 1>, <5 5>, <10 6>;
33 Above property provides event-range for 7 lines.
34 5 first lines contain one element
35 6th line starts with input line 5 and contains 5 elements (5 to 9)
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| /Zephyr-latest/dts/arm/nuvoton/npcx/npcx4/ |
| D | npcx4-lvol-ctrl-map.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Common Low-Voltage level configurations in npcx family */
8 #include <nuvoton/npcx/npcx-lvol-ctrl-map.dtsi>
10 /* Specific Low-Voltage level configurations in npcx4 series */
12 def-lvol-conf-list {
13 compatible = "nuvoton,npcx-lvolctrl-conf";
15 /* Low-Voltage IO Control 1 */
20 /* Low-Voltage IO Control 2 */
25 /* Low-Voltage IO Control 5 */
27 lvols = <&scfg 5 4>;
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| /Zephyr-latest/soc/intel/apollo_lake/ |
| D | soc_gpio.h | 2 * Copyright (c) 2018-2019, Intel Corporation
4 * SPDX-License-Identifier: Apache-2.0
20 #define PAD_CFG0_PMODE_MASK (0x0F << 10)
28 #define APL_GPIO_5 5
33 #define APL_GPIO_10 10
62 #define APL_GPIO_37 5
67 #define APL_GPIO_42 10
96 #define APL_GPIO_CX_PRDY_B 5
101 #define APL_GPIO_CNV_RGI_RSP 10
112 #define APL_GPIO_192 5
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| /Zephyr-latest/samples/kernel/condition_variables/simple/ |
| D | README.rst | 26 .. zephyr-app-commands::
27 :zephyr-app: samples/kernel/condition_variables/simple
28 :host-os: unix
38 .. code-block:: console
40 [thread 0] working (0/5)
41 [thread 1] working (0/5)
42 [thread 2] working (0/5)
43 [thread 3] working (0/5)
44 [thread 4] working (0/5)
45 [thread 5] working (0/5)
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| /Zephyr-latest/dts/arm/renesas/rz/rzg/ |
| D | r9a08g045.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m33";
23 clock-frequency = <250000000>;
24 #address-cells = <1>;
25 #size-cells = <1>;
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| /Zephyr-latest/tests/lib/c_lib/common/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
14 * NOT guarantee that ALL standards-defined functionality is present, nor does
50 * below (the static source string is longer than the locally-defined
55 #pragma GCC diagnostic ignored "-Wstringop-truncation"
70 * @brief Test implementation-defined constants library
85 return -1; in foobar()
145 && (INT8_C(-1) == -1) \ in ZTEST()
147 && (INT16_C(-2) == -2) \ in ZTEST()
149 && (INT32_C(-4) == -4) \ in ZTEST()
151 && (INT64_C(-8) == -8) \ in ZTEST()
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| /Zephyr-latest/boards/renesas/ek_ra8d1/ |
| D | ek_ra8d1-pinctrl.dtsi | 3 * SPDX-License-Identifier: Apache-2.0
10 psels = <RA_PSEL(RA_PSEL_SCI_9, 10, 14)>;
11 drive-strength = "medium";
15 psels = <RA_PSEL(RA_PSEL_SCI_9, 10, 15)>;
22 psels = <RA_PSEL(RA_PSEL_SPI, 4, 10)>,
32 psels = <RA_PSEL(RA_PSEL_GPT1, 10, 7)>;
36 psels = <RA_PSEL(RA_PSEL_GPT1, 10, 6)>;
45 drive-strength = "high";
52 psels = <RA_PSEL(RA_PSEL_I2C, 5, 12)>,<RA_PSEL(RA_PSEL_I2C, 5, 11)>;
53 drive-strength = "medium";
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| /Zephyr-latest/tests/subsys/display/cfb/basic/src/ |
| D | draw_rect.c | 4 * SPDX-License-Identifier: Apache-2.0
53 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
64 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
76 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
86 struct cfb_position start = {10, 16}; in ZTEST()
87 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
92 zassert_true(verify_image_and_bg(10, 16, rectspace1123, 11, 23, 0), ""); in ZTEST()
98 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
111 struct cfb_position start = {-(11 - 3), -(23 - 4)}; in ZTEST()
112 struct cfb_position end = {start.x + 10, start.y + 22}; in ZTEST()
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| D | draw_text_rectspace1016.c | 4 * SPDX-License-Identifier: Apache-2.0
49 if (font_width == 10 && font_height == 16) { in cfb_test_before()
72 zassert_true(verify_image_and_bg(0, 0, rectspace1016, 10, 16, 0)); in ZTEST()
80 zassert_true(verify_image_and_bg(1, 1, rectspace1016, 10, 16, 0)); in ZTEST()
91 zassert_true(verify_image_and_bg(9, 15, rectspace1016, 10, 16, 0)); in ZTEST()
96 zassert_ok(cfb_draw_text(dev, " ", 10, 16)); in ZTEST()
99 zassert_true(verify_image_and_bg(10, 16, rectspace1016, 10, 16, 0)); in ZTEST()
107 zassert_true(verify_image_and_bg(11, 17, rectspace1016, 10, 16, 0)); in ZTEST()
143 zassert_ok(cfb_draw_text(dev, " ", 10, 16)); in ZTEST()
146 zassert_true(verify_image_and_bg(10, 16, kerning_3_2rectspace1016, 23, 16, 0)); in ZTEST()
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| /Zephyr-latest/tests/lib/cmsis_dsp/filtering/src/ |
| D | misc_f16.c | 3 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
5 * SPDX-License-Identifier: Apache-2.0
17 #define REL_ERROR_THRESH (1.0e-4)
18 #define ABS_ERROR_THRESH (1.0e-3)
20 #define REL_ERROR_THRESH_LD (1.0e-3)
21 #define ABS_ERROR_THRESH_LD (1.0e-3)
62 DEFINE_CORRELATE_TEST(5, 1);
63 DEFINE_CORRELATE_TEST(5, 2);
64 DEFINE_CORRELATE_TEST(5, 3);
65 DEFINE_CORRELATE_TEST(5, 8);
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| /Zephyr-latest/drivers/ipm/ |
| D | ipm_nrfx_ipc.h | 4 * SPDX-License-Identifier: Apache-2.0
13 * Message channels are one-way connections between cores.
19 * SIGNAL0 -> CHANNEL0 -> EVENT0
24 * EVENT1 <- CHANNEL1 <- SIGNAL1
37 IPC_EVENT_BIT(5) | \
42 IPC_EVENT_BIT(10) | \
57 [5] = BIT(5),
62 [10] = BIT(10),
75 [5] = BIT(5),
80 [10] = BIT(10),
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| /Zephyr-latest/include/zephyr/dt-bindings/memory-controller/ |
| D | renesas,ra-sdram.h | 3 * SPDX-License-Identifier: Apache-2.0
13 #define SDRAM_TRAS_5CYCLES (5)
26 #define SDRAM_TRP_5CYCLES (5)
42 #define SDRAM_TREFW_5CYCLES (5)
47 #define SDRAM_TREFW_10CYCLES (10)
57 #define SDRAM_AUTO_REFREDSH_INTERVEL_5CYCLES (5)
62 #define SDRAM_AUTO_REFREDSH_INTERVEL_10CYCLES (10)
78 #define SDRAM_AUTO_REFREDSH_COUNT_5TIMES (5)
83 #define SDRAM_AUTO_REFREDSH_COUNT_10TIMES (10)
92 #define SDRAM_AUTO_PRECHARGE_CYCLE_5CYCLES (5)
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| /Zephyr-latest/samples/modules/tflite-micro/hello_world/train/ |
| D | train_hello_world_model.ipynb | 31 "<table class=\"tfo-notebook-buttons\" align=\"left\">\n",
36 …o_world_model.ipynb\"><img src=\"https://www.tensorflow.org/images/GitHub-Mark-32px.png\" />View s…
53 "id": "5PYwRFppd-WB"
84 "outputId": "510567d6-300e-40e2-f5b8-c3520a3f3a8b",
97 …"Requirement already satisfied: tensorflow==2.4.0rc0 in /usr/local/lib/python3.6/dist-packages (2.…
98 …"Requirement already satisfied: termcolor~=1.1.0 in /usr/local/lib/python3.6/dist-packages (from t…
99 …"Requirement already satisfied: gast==0.3.3 in /usr/local/lib/python3.6/dist-packages (from tensor…
100 …"Requirement already satisfied: astunparse~=1.6.3 in /usr/local/lib/python3.6/dist-packages (from …
101 …"Requirement already satisfied: absl-py~=0.10 in /usr/local/lib/python3.6/dist-packages (from tens…
102 …"Requirement already satisfied: keras-preprocessing~=1.1.2 in /usr/local/lib/python3.6/dist-packag…
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| /Zephyr-latest/dts/bindings/gpio/ |
| D | seeed-xiao-header.yaml | 4 # SPDX-License-Identifier: Apache-2.0
12 Proceeding counter-clockwise:
13 * A 7-pin Digital/Analog Input header. This has input signals
15 * An 7-pin header Power and Digital/Analog Input header. This
16 has three power pins, followed by four inputs labeled 10 at the
19 This binding provides a nexus mapping for 10 pins where parent pins 0
20 through 10 correspond to D0 through D10, as depicted below:
22 0 D0 5V -
23 1 D1 GND -
24 2 D2 3V3 -
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| /Zephyr-latest/dts/arm/infineon/cat1a/psoc6_01/ |
| D | psoc6_01.43-smt.dtsi | 5 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
14 /delete-node/ gpio@40320080; // gpio_prt1
15 /delete-node/ gpio@40320100; // gpio_prt2
16 /delete-node/ gpio@40320180; // gpio_prt3
17 /delete-node/ gpio@40320200; // gpio_prt4
18 /delete-node/ gpio@40320400; // gpio_prt8
19 /delete-node/ gpio@40320580; // gpio_prt11
20 /delete-node/ gpio@40320680; // gpio_prt13
[all …]
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| /Zephyr-latest/include/zephyr/dt-bindings/pinctrl/ |
| D | esp32c2-pinctrl.h | 4 * SPDX-License-Identifier: Apache-2.0
23 #define LEDC_CH0_GPIO5 ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
33 #define LEDC_CH0_GPIO10 ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
52 #define LEDC_CH1_GPIO5 ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
62 #define LEDC_CH1_GPIO10 ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
81 #define LEDC_CH2_GPIO5 ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
91 #define LEDC_CH2_GPIO10 ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
110 #define LEDC_CH3_GPIO5 ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
120 #define LEDC_CH3_GPIO10 ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
139 #define LEDC_CH4_GPIO5 ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
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| /Zephyr-latest/tests/drivers/adc/adc_api/boards/ |
| D | numaker_m2l31ki.overlay | 1 /* SPDX-License-Identifier: Apache-2.0 */
5 io-channels = <&eadc0 5>, <&eadc0 7>;
10 /* EVB's UNO Pin A2 & A0 for channel 5 & 7 --> PB5, PB7 */
20 pinctrl-0 = <&eadc0_default>;
21 pinctrl-names = "default";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 channel@5 {
26 reg = <5>;
29 zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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| /Zephyr-latest/drivers/ethernet/phy/ |
| D | phy_dm8806_priv.h | 4 * SPDX-License-Identifier: Apache-2.0
9 /* 10 Mbit/s transfer with half duplex mask. */
11 /* 10 Mbit/s transfer with full duplex mask. */
28 /* 10 Mbit/s transfer speed with half duplex. */
30 /* 10 Mbit/s transfer speed with full duplex. */
120 /* Port 5 Force Speed control bit */
122 /* Port 5 Force Duplex control bit */
124 /* Port 5 Force Link control bit. Only available in force mode. */
126 /* Port 5 Force Mode Enable control bit. Only available for
131 /* Port 5 50MHz Clock Output Enable control bit. Only available when Port 5
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| /Zephyr-latest/drivers/sensor/ti/tmp116/ |
| D | tmp116.h | 4 * SPDX-License-Identifier: Apache-2.0
30 #define TMP116_CFGR_AVG (BIT(5) | BIT(6))
32 #define TMP116_CFGR_MODE (BIT(10) | BIT(11))
38 #define TMP116_AVG_8_SAMPLES BIT(5)
40 #define TMP116_AVG_64_SAMPLES (BIT(5) | BIT(6))
42 #define TMP116_MODE_SHUTDOWN BIT(10)
43 #define TMP116_MODE_ONE_SHOT (BIT(10) | BIT(11))
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| /Zephyr-latest/tests/lib/linear_range/src/ |
| D | main.c | 3 * SPDX-License-Identifier: Apache-2.0
10 * +-----+-----+
12 * +-----+-----+
13 * | -10 | 0 |
14 * | -5 | 1 |
15 * +-----+-----+
18 * +-----+-----+
20 * | 130 | 5 |
25 * | 290 | 10 |
26 * +-----+-----+
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| /Zephyr-latest/samples/tfm_integration/tfm_secure_partition/dummy_partition/ |
| D | dummy_partition.c | 4 * SPDX-License-Identifier: Apache-2.0
14 #define NUM_SECRETS 5
21 { {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15} },
22 { {1, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15} },
23 { {2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15} },
24 { {3, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15} },
25 { {4, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15} },
77 if (msg->in_size[0] != sizeof(secret_index)) { in tfm_dp_secret_digest_ipc()
82 num = psa_read(msg->handle, 0, &secret_index, msg->in_size[0]); in tfm_dp_secret_digest_ipc()
83 if (num != msg->in_size[0]) { in tfm_dp_secret_digest_ipc()
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