Lines Matching +full:5 +full:- +full:10
4 * SPDX-License-Identifier: Apache-2.0
9 /* 10 Mbit/s transfer with half duplex mask. */
11 /* 10 Mbit/s transfer with full duplex mask. */
28 /* 10 Mbit/s transfer speed with half duplex. */
30 /* 10 Mbit/s transfer speed with full duplex. */
120 /* Port 5 Force Speed control bit */
122 /* Port 5 Force Duplex control bit */
124 /* Port 5 Force Link control bit. Only available in force mode. */
126 /* Port 5 Force Mode Enable control bit. Only available for
131 /* Port 5 50MHz Clock Output Enable control bit. Only available when Port 5
134 #define P5_50M_CLK_OUT_ENABLE BIT(5)
135 /* Port 5 Clock Source Selection control bit. Only available when Port 5
139 /* Port 5 Output Pin Slew Rate. */
145 * 100M link fail - LED off
146 * 100M link ok and no TX/RX activity - LED on
147 * 100M link ok and TX/RX activity - LED blinking
149 * No colision: - LED off
150 * Colision: - LED blinking
152 * 10M link fail - LED off
153 * 10M link ok and no TX/RX activity - LED on
154 * 10M link ok and TX/RX activity - LED blinking