Lines Matching +full:5 +full:- +full:10
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m33";
23 clock-frequency = <250000000>;
24 #address-cells = <1>;
25 #size-cells = <1>;
28 compatible = "arm,armv8m-mpu";
35 pinctrl: pin-controller@41030000 {
36 compatible = "renesas,rzg-pinctrl";
38 reg-names = "pinctrl";
40 gpio: gpio-common {
41 compatible = "renesas,rz-gpio-int";
43 <429 10>, <430 10>, <431 10>, <432 10>,
44 <433 10>, <434 10>, <435 10>, <436 10>,
45 <437 10>, <438 10>, <439 10>, <440 10>,
46 <441 10>, <442 10>, <443 10>, <444 10>,
47 <445 10>, <446 10>, <447 10>, <448 10>,
48 <449 10>, <450 10>, <451 10>, <452 10>,
49 <453 10>, <454 10>, <455 10>, <456 10>,
50 <457 10>, <458 10>, <459 10>, <460 10>;
51 #address-cells = <1>;
52 #size-cells = <0>;
56 compatible = "renesas,rz-gpio";
57 gpio-controller;
58 #gpio-cells = <2>;
65 compatible = "renesas,rz-gpio";
66 gpio-controller;
67 #gpio-cells= <2>;
68 ngpios = <5>;
74 compatible = "renesas,rz-gpio";
75 gpio-controller;
76 #gpio-cells= <2>;
83 compatible = "renesas,rz-gpio";
84 gpio-controller;
85 #gpio-cells= <2>;
92 compatible = "renesas,rz-gpio";
93 gpio-controller;
94 #gpio-cells= <2>;
101 compatible = "renesas,rz-gpio";
102 gpio-controller;
103 #gpio-cells= <2>;
104 ngpios = <5>;
110 compatible = "renesas,rz-gpio";
111 gpio-controller;
112 #gpio-cells= <2>;
113 ngpios = <5>;
119 compatible = "renesas,rz-gpio";
120 gpio-controller;
121 #gpio-cells= <2>;
122 ngpios = <5>;
128 compatible = "renesas,rz-gpio";
129 gpio-controller;
130 #gpio-cells= <2>;
131 ngpios = <5>;
137 compatible = "renesas,rz-gpio";
138 gpio-controller;
139 #gpio-cells= <2>;
146 compatible = "renesas,rz-gpio";
147 gpio-controller;
148 #gpio-cells= <2>;
149 ngpios = <5>;
155 compatible = "renesas,rz-gpio";
156 gpio-controller;
157 #gpio-cells= <2>;
164 compatible = "renesas,rz-gpio";
165 gpio-controller;
166 #gpio-cells= <2>;
173 compatible = "renesas,rz-gpio";
174 gpio-controller;
175 #gpio-cells= <2>;
176 ngpios = <5>;
182 compatible = "renesas,rz-gpio";
183 gpio-controller;
184 #gpio-cells= <2>;
191 compatible = "renesas,rz-gpio";
192 gpio-controller;
193 #gpio-cells= <2>;
200 compatible = "renesas,rz-gpio";
201 gpio-controller;
202 #gpio-cells= <2>;
209 compatible = "renesas,rz-gpio";
210 gpio-controller;
211 #gpio-cells= <2>;
218 compatible = "renesas,rz-gpio";
219 gpio-controller;
220 #gpio-cells=<2>;
229 compatible = "renesas,rz-scif-uart";
233 interrupt-names = "eri", "bri", "rxi", "txi", "tei";
237 compatible = "renesas,rz-scif-uart";
241 interrupt-names = "eri", "bri", "rxi", "txi", "tei";
245 compatible = "renesas,rz-scif-uart";
249 interrupt-names = "eri", "bri", "rxi", "txi", "tei";
253 compatible = "renesas,rz-scif-uart";
257 interrupt-names = "eri", "bri", "rxi", "txi", "tei";
261 compatible = "renesas,rz-scif-uart";
265 interrupt-names = "eri", "bri", "rxi", "txi", "tei";
269 compatible = "renesas,rz-scif-uart";
270 channel = <5>;
273 interrupt-names = "eri", "bri", "rxi", "txi", "tei";
280 arm,num-irq-priority-bits = <7>;