/*
 * Copyright (c) 2024 EPAM Systems
 * Copyright (c) 2024 Renesas Electronics Corporation
 * SPDX-License-Identifier: Apache-2.0
 */

#include <arm/armv8-m.dtsi>
#include <mem.h>

/ {
	compatible = "renesas,r9a08g045";
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m33";
			reg = <0>;
			clock-frequency = <250000000>;
			#address-cells = <1>;
			#size-cells = <1>;

			mpu: mpu@e000ed90 {
				compatible = "arm,armv8m-mpu";
				reg = <0xe000ed90 0x40>;
			};
		};
	};

	soc {
		pinctrl: pin-controller@41030000 {
			compatible = "renesas,rzg-pinctrl";
			reg = <0x41030000 DT_SIZE_K(64)>;
			reg-names = "pinctrl";

			gpio: gpio-common {
				compatible = "renesas,rz-gpio-int";
				interrupts =
					<429 10>, <430 10>, <431 10>, <432 10>,
					<433 10>, <434 10>, <435 10>, <436 10>,
					<437 10>, <438 10>, <439 10>, <440 10>,
					<441 10>, <442 10>, <443 10>, <444 10>,
					<445 10>, <446 10>, <447 10>, <448 10>,
					<449 10>, <450 10>, <451 10>, <452 10>,
					<453 10>, <454 10>, <455 10>, <456 10>,
					<457 10>, <458 10>, <459 10>, <460 10>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";

				gpio0: gpio@0 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells = <2>;
					ngpios = <4>;
					reg = <0x0>;
					status = "disabled";
				};

				gpio1: gpio@1000 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <5>;
					reg = <0x1000>;
					status = "disabled";
				};

				gpio2: gpio@1100 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <4>;
					reg = <0x1100>;
					status = "disabled";
				};

				gpio3: gpio@1200 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <4>;
					reg = <0x1200>;
					status = "disabled";
				};

				gpio4: gpio@1300 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <6>;
					reg = <0x1300>;
					status = "disabled";
				};

				gpio5: gpio@100 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <5>;
					reg = <0x100>;
					status = "disabled";
				};

				gpio6: gpio@200 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <5>;
					reg = <0x200>;
					status = "disabled";
				};

				gpio7: gpio@1400 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <5>;
					reg = <0x1400>;
					status = "disabled";
				};

				gpio8: gpio@1500 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <5>;
					reg = <0x1500>;
					status = "disabled";
				};

				gpio9: gpio@1600 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <4>;
					reg = <0x1600>;
					status = "disabled";
				};

				gpio10: gpio@1700 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <5>;
					reg = <0x1700>;
					status = "disabled";
				};

				gpio11: gpio@300 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <4>;
					reg = <0x300>;
					status = "disabled";
				};

				gpio12: gpio@400 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <2>;
					reg = <0x400>;
					status = "disabled";
				};

				gpio13: gpio@500 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <5>;
					reg = <0x500>;
					status = "disabled";
				};

				gpio14: gpio@600 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <3>;
					reg = <0x600>;
					status = "disabled";
				};

				gpio15: gpio@700 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <4>;
					reg = <0x700>;
					status = "disabled";
				};

				gpio16: gpio@800 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <2>;
					reg = <0x800>;
					status = "disabled";
				};

				gpio17: gpio@900 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells= <2>;
					ngpios = <4>;
					reg = <0x900>;
					status = "disabled";
				};

				gpio18: gpio@A00 {
					compatible = "renesas,rz-gpio";
					gpio-controller;
					#gpio-cells=<2>;
					ngpios = <6>;
					reg = <0xA00>;
					status = "disabled";
				};
			};
		};

		scif0: serial@4004b800 {
			compatible = "renesas,rz-scif-uart";
			channel = <0>;
			reg = <0x4004b800 0x18>;
			interrupts = <320 1>, <321 1>, <322 1>, <323 1>, <324 1>;
			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
			status = "disabled";
		};
		scif1: serial@4004bc00 {
			compatible = "renesas,rz-scif-uart";
			channel = <1>;
			reg = <0x4004bc00 0x18>;
			interrupts = <325 1>, <326 1>, <327 1>, <328 1>, <329 1>;
			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
			status = "disabled";
		};
		scif2: serial@4004c000 {
			compatible = "renesas,rz-scif-uart";
			channel = <2>;
			reg = <0x4004c000 0x18>;
			interrupts = <330 1>, <331 1>, <332 1>, <333 1>, <334 1>;
			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
			status = "disabled";
		};
		scif3: serial@4004c400 {
			compatible = "renesas,rz-scif-uart";
			channel = <3>;
			reg = <0x4004c400 0x18>;
			interrupts = <335 1>, <336 1>, <337 1>, <338 1>, <339 1>;
			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
			status = "disabled";
		};
		scif4: serial@4004c800 {
			compatible = "renesas,rz-scif-uart";
			channel = <4>;
			reg = <0x4004c800 0x18>;
			interrupts = <340 1>, <341 1>, <342 1>, <343 1>, <344 1>;
			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
			status = "disabled";
		};
		scif5: serial@4004e000 {
			compatible = "renesas,rz-scif-uart";
			channel = <5>;
			reg = <0x4004e000 0x18>;
			interrupts = <345 1>, <346 1>, <347 1>, <348 1>, <349 1>;
			interrupt-names = "eri", "bri", "rxi", "txi", "tei";
			status = "disabled";
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <7>;
};