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/Linux-v5.10/Documentation/devicetree/bindings/serial/
Dsocionext,uniphier-uart.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/socionext,uniphier-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier UART controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 const: socionext,uniphier-uart
25 auto-flow-control:
30 - compatible
31 - reg
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/Linux-v5.10/arch/arm/boot/dts/
Duniphier-ld4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-ld4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
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Duniphier-sld8.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier sLD8 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-sld8";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
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Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
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Duniphier-pro5.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro5 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
9 compatible = "socionext,uniphier-pro5";
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 enable-method = "psci";
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Duniphier-pxs2.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs2 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/thermal/thermal.h>
12 compatible = "socionext,uniphier-pxs2";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
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/Linux-v5.10/arch/arm64/boot/dts/socionext/
Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD11 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
12 compatible = "socionext,uniphier-ld11";
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <0>;
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Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs3 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-pxs3";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
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Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-ld20";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
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Duniphier-ld20-akebi96.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Derived from uniphier-ld20-global.dts.
7 // Copyright (C) 2015-2017 Socionext Inc.
8 // Copyright (C) 2019-2020 Linaro Ltd.
10 /dts-v1/;
11 #include <dt-bindings/gpio/uniphier-gpio.h>
12 #include "uniphier-ld20.dtsi"
16 compatible = "socionext,uniphier-ld20-akebi96",
17 "socionext,uniphier-ld20";
20 stdout-path = "serial0:115200n8";
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/Linux-v5.10/drivers/tty/serial/8250/
D8250_uniphier.c1 // SPDX-License-Identifier: GPL-2.0+
17 * - MMIO32 (regshift = 2)
18 * - FCR is not at 2, but 3
19 * - LCR and MCR are not at 3 and 4, they share 4
20 * - No SCR (Instead, CHAR can be used as a scratch register)
21 * - Divisor latch at 9, no divisor latch access bit
43 if (!device->port.membase) in uniphier_early_console_setup()
44 return -ENODEV; in uniphier_early_console_setup()
47 device->port.iotype = UPIO_MEM32; in uniphier_early_console_setup()
48 device->port.regshift = UNIPHIER_UART_REGSHIFT; in uniphier_early_console_setup()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0
24 non-standard serial ports, since the configuration information will
52 If you did not notice yet and/or you have userspace from pre-3.7, it
75 bool "Support for Fintek F81216A LPC to 4 UART RS485 API"
79 of the Fintek F81216A LPC to 4 UART.
126 bool "DMA support for 16550 compatible UART controllers" if EXPERT
131 compatible UART controllers that support DMA signaling.
141 Note that serial ports on NetMos 9835 Multi-I/O cards are handled
162 Say Y here to enable support for 16-bit PCMCIA serial devices,
164 multi-function Ethernet/modem cards. (PCMCIA- or PC-cards are
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/Linux-v5.10/Documentation/devicetree/bindings/bus/
Dsocionext,uniphier-system-bus.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier System Bus
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
16 within each bank to the CPU-viewed address. The needed setup includes the
21 - Masahiro Yamada <yamada.masahiro@socionext.com>
25 const: socionext,uniphier-system-bus
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/Linux-v5.10/drivers/clk/uniphier/
Dclk-uniphier-peri.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include "clk-uniphier.h"
10 UNIPHIER_CLK_GATE("uart" #ch, (idx), "uart", 0x24, 19 + (ch))
13 UNIPHIER_CLK_GATE("i2c-common", -1, "i2c", 0x20, 1)
16 UNIPHIER_CLK_GATE("i2c" #ch, (idx), "i2c-common", 0x24, 5 + (ch))
Dclk-uniphier-sys.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "clk-uniphier.h"
12 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 8), \
13 UNIPHIER_CLK_FACTOR("sd-133m", -1, "vpll27a", 1, 2)
16 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 12), \
17 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 18)
20 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 10), \
21 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 15)
24 UNIPHIER_CLK_FACTOR("nand-50m", -1, "spll", 1, 32), \
25 UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)
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/Linux-v5.10/drivers/bus/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
53 errors counter. The counter and the APB-bus operations timeout can be
57 bool "Baikal-T1 AXI-bus driver"
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
103 cores. This bus is for per-CPU tightly coupled devices such as the
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/Linux-v5.10/drivers/dma/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
102 tristate "Analog Devices AXI-DMAC DMA support"
108 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
128 bool "ST-Ericsson COH901318 DMA support"
132 Enable support for ST-Ericsson COH 901 318 DMA.
151 tristate "SA-11x0 DMA support"
156 Support the DMA engine found on Intel StrongARM SA-1100 and
157 SA-1110 SoCs. This DMA engine can only be used with on-chip
215 This module can be found on Freescale Vybrid and LS-1 SoCs.
258 Enable support for the IMG multi-threaded DMA controller (MDC).
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/Linux-v5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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