Lines Matching +full:uniphier +full:- +full:uart
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
24 next-level-cache = <&l2>;
29 compatible = "arm,cortex-a9";
31 enable-method = "psci";
32 next-level-cache = <&l2>;
37 compatible = "arm,psci-0.2";
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <25000000>;
48 arm_timer_clk: arm-timer {
49 #clock-cells = <0>;
50 compatible = "fixed-clock";
51 clock-frequency = <50000000>;
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
60 interrupt-parent = <&intc>;
62 l2: cache-controller@500c0000 {
63 compatible = "socionext,uniphier-system-cache";
67 cache-unified;
68 cache-size = <(768 * 1024)>;
69 cache-sets = <256>;
70 cache-line-size = <128>;
71 cache-level = <2>;
75 compatible = "socionext,uniphier-scssi";
78 #address-cells = <1>;
79 #size-cells = <0>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_spi0>;
88 compatible = "socionext,uniphier-uart";
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_uart0>;
99 compatible = "socionext,uniphier-uart";
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_uart1>;
110 compatible = "socionext,uniphier-uart";
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_uart2>;
121 compatible = "socionext,uniphier-uart";
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_uart3>;
132 compatible = "socionext,uniphier-gpio";
134 interrupt-parent = <&aidet>;
135 interrupt-controller;
136 #interrupt-cells = <2>;
137 gpio-controller;
138 #gpio-cells = <2>;
139 gpio-ranges = <&pinctrl 0 0 0>;
140 gpio-ranges-group-names = "gpio_range";
142 socionext,interrupt-ranges = <0 48 16>, <16 154 5>;
146 compatible = "socionext,uniphier-fi2c";
149 #address-cells = <1>;
150 #size-cells = <0>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_i2c0>;
156 clock-frequency = <100000>;
160 compatible = "socionext,uniphier-fi2c";
163 #address-cells = <1>;
164 #size-cells = <0>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_i2c1>;
170 clock-frequency = <100000>;
174 compatible = "socionext,uniphier-fi2c";
177 #address-cells = <1>;
178 #size-cells = <0>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_i2c2>;
184 clock-frequency = <100000>;
188 compatible = "socionext,uniphier-fi2c";
191 #address-cells = <1>;
192 #size-cells = <0>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&pinctrl_i2c3>;
198 clock-frequency = <100000>;
203 /* chip-internal connection for DMD */
205 compatible = "socionext,uniphier-fi2c";
207 #address-cells = <1>;
208 #size-cells = <0>;
212 clock-frequency = <400000>;
215 /* chip-internal connection for HDMI */
217 compatible = "socionext,uniphier-fi2c";
219 #address-cells = <1>;
220 #size-cells = <0>;
224 clock-frequency = <400000>;
227 system_bus: system-bus@58c00000 {
228 compatible = "socionext,uniphier-system-bus";
231 #address-cells = <2>;
232 #size-cells = <1>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_system_bus>;
238 compatible = "socionext,uniphier-smpctrl";
243 compatible = "socionext,uniphier-pro4-mioctrl",
244 "simple-mfd", "syscon";
248 compatible = "socionext,uniphier-pro4-mio-clock";
249 #clock-cells = <1>;
253 compatible = "socionext,uniphier-pro4-mio-reset";
254 #reset-cells = <1>;
259 compatible = "socionext,uniphier-pro4-perictrl",
260 "simple-mfd", "syscon";
264 compatible = "socionext,uniphier-pro4-peri-clock";
265 #clock-cells = <1>;
269 compatible = "socionext,uniphier-pro4-peri-reset";
270 #reset-cells = <1>;
274 dmac: dma-controller@5a000000 {
275 compatible = "socionext,uniphier-mio-dmac";
281 #dma-cells = <1>;
285 compatible = "socionext,uniphier-sd-v2.91";
289 pinctrl-names = "default", "uhs";
290 pinctrl-0 = <&pinctrl_sd>;
291 pinctrl-1 = <&pinctrl_sd_uhs>;
293 reset-names = "host", "bridge";
295 dma-names = "rx-tx";
297 bus-width = <4>;
298 cap-sd-highspeed;
299 sd-uhs-sdr12;
300 sd-uhs-sdr25;
301 sd-uhs-sdr50;
305 compatible = "socionext,uniphier-sd-v2.91";
309 pinctrl-names = "default";
310 pinctrl-0 = <&pinctrl_emmc>;
312 reset-names = "host", "bridge", "hw";
314 dma-names = "rx-tx";
316 bus-width = <8>;
317 cap-mmc-highspeed;
318 cap-mmc-hw-reset;
319 non-removable;
323 compatible = "socionext,uniphier-sd-v2.91";
327 pinctrl-names = "default";
328 pinctrl-0 = <&pinctrl_sd1>;
330 reset-names = "host", "bridge";
332 dma-names = "rx-tx";
334 bus-width = <4>;
335 cap-sd-highspeed;
339 compatible = "socionext,uniphier-ehci", "generic-ehci";
343 pinctrl-names = "default";
344 pinctrl-0 = <&pinctrl_usb2>;
349 phy-names = "usb";
351 has-transaction-translator;
355 compatible = "socionext,uniphier-ehci", "generic-ehci";
359 pinctrl-names = "default";
360 pinctrl-0 = <&pinctrl_usb3>;
365 phy-names = "usb";
367 has-transaction-translator;
370 soc_glue: soc-glue@5f800000 {
371 compatible = "socionext,uniphier-pro4-soc-glue",
372 "simple-mfd", "syscon";
376 compatible = "socionext,uniphier-pro4-pinctrl";
379 usb-phy {
380 compatible = "socionext,uniphier-pro4-usb2-phy";
381 #address-cells = <1>;
382 #size-cells = <0>;
386 #phy-cells = <0>;
391 #phy-cells = <0>;
396 #phy-cells = <0>;
397 vbus-supply = <&usb0_vbus>;
402 #phy-cells = <0>;
403 vbus-supply = <&usb1_vbus>;
408 soc-glue@5f900000 {
409 compatible = "socionext,uniphier-pro4-soc-glue-debug",
410 "simple-mfd";
411 #address-cells = <1>;
412 #size-cells = <1>;
416 compatible = "socionext,uniphier-efuse";
421 compatible = "socionext,uniphier-efuse";
426 compatible = "socionext,uniphier-efuse";
431 xdmac: dma-controller@5fc10000 {
432 compatible = "socionext,uniphier-xdmac";
435 dma-channels = <16>;
436 #dma-cells = <2>;
439 aidet: interrupt-controller@5fc20000 {
440 compatible = "socionext,uniphier-pro4-aidet";
442 interrupt-controller;
443 #interrupt-cells = <2>;
447 compatible = "arm,cortex-a9-global-timer";
454 compatible = "arm,cortex-a9-twd-timer";
460 intc: interrupt-controller@60001000 {
461 compatible = "arm,cortex-a9-gic";
464 #interrupt-cells = <3>;
465 interrupt-controller;
469 compatible = "socionext,uniphier-pro4-sysctrl",
470 "simple-mfd", "syscon";
474 compatible = "socionext,uniphier-pro4-clock";
475 #clock-cells = <1>;
479 compatible = "socionext,uniphier-pro4-reset";
480 #reset-cells = <1>;
485 compatible = "socionext,uniphier-pro4-ave4";
489 pinctrl-names = "default";
490 pinctrl-0 = <&pinctrl_ether_rgmii>;
491 clock-names = "gio", "ether", "ether-gb", "ether-phy";
494 reset-names = "gio", "ether";
496 phy-mode = "rgmii";
497 local-mac-address = [00 00 00 00 00 00];
498 socionext,syscon-phy-mode = <&soc_glue 0>;
501 #address-cells = <1>;
502 #size-cells = <0>;
507 compatible = "socionext,uniphier-dwc3", "snps,dwc3";
510 interrupt-names = "host", "peripheral";
512 pinctrl-names = "default";
513 pinctrl-0 = <&pinctrl_usb0>;
514 clock-names = "ref", "bus_early", "suspend";
521 usb-glue@65b00000 {
522 compatible = "socionext,uniphier-pro4-dwc3-glue",
523 "simple-mfd";
524 #address-cells = <1>;
525 #size-cells = <1>;
529 compatible = "socionext,uniphier-pro4-usb3-regulator";
531 clock-names = "gio", "link";
533 reset-names = "gio", "link";
537 usb0_ssphy: ss-phy@10 {
538 compatible = "socionext,uniphier-pro4-usb3-ssphy";
540 #phy-cells = <0>;
541 clock-names = "gio", "link";
543 reset-names = "gio", "link";
545 vbus-supply = <&usb0_vbus>;
549 compatible = "socionext,uniphier-pro4-usb3-reset";
551 #reset-cells = <1>;
552 clock-names = "gio", "link";
554 reset-names = "gio", "link";
560 compatible = "socionext,uniphier-dwc3", "snps,dwc3";
563 interrupt-names = "host", "peripheral";
565 pinctrl-names = "default";
566 pinctrl-0 = <&pinctrl_usb1>;
567 clock-names = "ref", "bus_early", "suspend";
574 usb-glue@65d00000 {
575 compatible = "socionext,uniphier-pro4-dwc3-glue",
576 "simple-mfd";
577 #address-cells = <1>;
578 #size-cells = <1>;
582 compatible = "socionext,uniphier-pro4-usb3-regulator";
584 clock-names = "gio", "link";
586 reset-names = "gio", "link";
591 compatible = "socionext,uniphier-pro4-usb3-reset";
593 #reset-cells = <1>;
594 clock-names = "gio", "link";
596 reset-names = "gio", "link";
601 nand: nand-controller@68000000 {
602 compatible = "socionext,uniphier-denali-nand-v5a";
604 reg-names = "nand_data", "denali_reg";
606 #address-cells = <1>;
607 #size-cells = <0>;
609 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_nand>;
611 clock-names = "nand", "nand_x", "ecc";
613 reset-names = "nand", "reg";
619 #include "uniphier-pinctrl.dtsi"