Home
last modified time | relevance | path

Searched full:cru (Results 1 – 25 of 142) sorted by relevance

123456

/Linux-v5.10/arch/arm64/boot/dts/rockchip/
Drk3399.dtsi6 #include <dt-bindings/clock/rk3399-cru.h>
78 clocks = <&cru ARMCLKL>;
90 clocks = <&cru ARMCLKL>;
102 clocks = <&cru ARMCLKL>;
114 clocks = <&cru ARMCLKL>;
126 clocks = <&cru ARMCLKB>;
138 clocks = <&cru ARMCLKB>;
216 clocks = <&cru ACLK_DMAC0_PERILP>;
227 clocks = <&cru ACLK_DMAC1_PERILP>;
242 clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
[all …]
Drk3328.dtsi6 #include <dt-bindings/clock/rk3328-cru.h>
42 clocks = <&cru ARMCLK>;
55 clocks = <&cru ARMCLK>;
68 clocks = <&cru ARMCLK>;
81 clocks = <&cru ARMCLK>;
157 clocks = <&cru ACLK_DMAC>;
233 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
245 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
257 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
269 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;
[all …]
Dpx30.dtsi6 #include <dt-bindings/clock/px30-cru.h>
47 clocks = <&cru ARMCLK>;
59 clocks = <&cru ARMCLK>;
71 clocks = <&cru ARMCLK>;
83 clocks = <&cru ARMCLK>;
249 clocks = <&cru HCLK_HOST>,
250 <&cru HCLK_OTG>,
251 <&cru SCLK_OTG_ADP>;
256 clocks = <&cru HCLK_SDMMC>,
257 <&cru SCLK_SDMMC>;
[all …]
Drk3368.dtsi6 #include <dt-bindings/clock/rk3368-cru.h>
153 clocks = <&cru ACLK_DMAC_PERI>;
165 clocks = <&cru ACLK_DMAC_BUS>;
213 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
214 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
218 resets = <&cru SRST_MMC0>;
227 clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
228 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
232 resets = <&cru SRST_SDIO0>;
241 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
[all …]
Drk3308.dtsi7 #include <dt-bindings/clock/rk3308-cru.h>
46 clocks = <&cru ARMCLK>;
197 clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
210 clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
223 clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
236 clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
249 clocks = <&cru PCLK_WDT>;
258 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
271 clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
284 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Drk3288.dtsi7 #include <dt-bindings/clock/rk3288-cru.h>
61 resets = <&cru SRST_CORE0>;
65 clocks = <&cru ARMCLK>;
72 resets = <&cru SRST_CORE1>;
76 clocks = <&cru ARMCLK>;
83 resets = <&cru SRST_CORE2>;
87 clocks = <&cru ARMCLK>;
94 resets = <&cru SRST_CORE3>;
98 clocks = <&cru ARMCLK>;
171 clocks = <&cru ACLK_DMAC2>;
[all …]
Drk322x.dtsi7 #include <dt-bindings/clock/rk3228-cru.h>
31 resets = <&cru SRST_CORE0>;
35 clocks = <&cru ARMCLK>;
43 resets = <&cru SRST_CORE1>;
53 resets = <&cru SRST_CORE2>;
63 resets = <&cru SRST_CORE3>;
111 clocks = <&cru ACLK_DMAC>;
157 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
170 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
180 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;
[all …]
Drk3066a.dtsi9 #include <dt-bindings/clock/rk3066a-cru.h>
37 clocks = <&cru ARMCLK>;
69 clocks = <&cru ACLK_LCDC0>,
70 <&cru DCLK_LCDC0>,
71 <&cru HCLK_LCDC0>;
74 resets = <&cru SRST_LCDC0_AXI>,
75 <&cru SRST_LCDC0_AHB>,
76 <&cru SRST_LCDC0_DCLK>;
95 clocks = <&cru ACLK_LCDC1>,
96 <&cru DCLK_LCDC1>,
[all …]
Drk3xxx.dtsi49 clocks = <&cru ACLK_DMA1>;
61 clocks = <&cru ACLK_DMA1>;
74 clocks = <&cru ACLK_DMA2>;
89 clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
91 assigned-clocks = <&cru ACLK_GPU>;
93 resets = <&cru SRST_GPU>;
113 clocks = <&cru CORE_PERI>;
120 clocks = <&cru CORE_PERI>;
138 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
149 clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
[all …]
Drk3036.dtsi7 #include <dt-bindings/clock/rk3036-cru.h>
40 resets = <&cru SRST_CORE0>;
46 clocks = <&cru ARMCLK>;
53 resets = <&cru SRST_CORE1>;
71 clocks = <&cru ACLK_DMAC2>;
129 assigned-clocks = <&cru SCLK_GPU>;
131 clocks = <&cru SCLK_GPU>, <&cru SCLK_GPU>;
133 resets = <&cru SRST_GPU>;
141 clocks = <&cru ACLK_LCDC>, <&cru SCLK_LCDC>, <&cru HCLK_LCDC>;
143 resets = <&cru SRST_LCDC1_A>, <&cru SRST_LCDC1_H>, <&cru SRST_LCDC1_D>;
[all …]
Drv1108.dtsi6 #include <dt-bindings/clock/rv1108-cru.h>
36 clocks = <&cru ARMCLK>;
101 clocks = <&cru ACLK_DMAC>;
121 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
136 clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
151 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
165 clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
179 clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
193 clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
205 clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
[all …]
Drk3188.dtsi9 #include <dt-bindings/clock/rk3188-cru.h>
27 clocks = <&cru ARMCLK>;
29 resets = <&cru SRST_CORE0>;
37 resets = <&cru SRST_CORE1>;
45 resets = <&cru SRST_CORE2>;
53 resets = <&cru SRST_CORE3>;
119 clocks = <&cru ACLK_LCDC0>, <&cru DCLK_LCDC0>, <&cru HCLK_LCDC0>;
122 resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
136 clocks = <&cru ACLK_LCDC1>, <&cru DCLK_LCDC1>, <&cru HCLK_LCDC1>;
139 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/net/
Drockchip-dwmac.txt20 - clocks: <&cru SCLK_MAC>: clock selector for main clock, from PLL or PHY.
21 <&cru SCLK_MAC_PLL>: PLL clock for SCLK_MAC
22 <&cru SCLK_MAC_RX>: clock gate for RX
23 <&cru SCLK_MAC_TX>: clock gate for TX
24 <&cru SCLK_MACREF>: clock gate for RMII referce clock
25 <&cru SCLK_MACREF_OUT> clock gate for RMII reference clock output
26 <&cru ACLK_GMAC>: AXI clock gate for GMAC
27 <&cru PCLK_GMAC>: APB clock gate for GMAC
38 - assigned-clocks: main clock, should be <&cru SCLK_MAC>;
40 can be <&ext_gmac> or <&cru SCLK_MAC_PLL>.
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/phy/
Dphy-rockchip-typec.txt11 - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or
12 <&cru SCLK_UPHY1_TCPDCORE>;
43 clocks = <&cru SCLK_UPHY0_TCPDCORE>,
44 <&cru SCLK_UPHY0_TCPDPHY_REF>;
46 assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
48 resets = <&cru SRST_UPHY0>,
49 <&cru SRST_UPHY0_PIPE_L00>,
50 <&cru SRST_P_UPHY0_TCPHY>;
67 clocks = <&cru SCLK_UPHY1_TCPDCORE>,
68 <&cru SCLK_UPHY1_TCPDPHY_REF>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/clock/
Drockchip,rk3128-cru.txt9 - compatible: should be "rockchip,rk3126-cru" or "rockchip,rk3128-cru"
10 "rockchip,rk3126-cru" - controller compatible with RK3126 SoC.
11 "rockchip,rk3128-cru" - controller compatible with RK3128 SoC.
24 preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be
39 cru: cru@20000000 {
40 compatible = "rockchip,rk3128-cru";
56 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
Drockchip,rk3188-cru.txt9 - compatible: should be "rockchip,rk3188-cru", "rockchip,rk3188a-cru" or
10 "rockchip,rk3066a-cru"
23 preprocessor macros in the dt-bindings/clock/rk3188-cru.h and
24 dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.
42 cru: cru@20000000 {
43 compatible = "rockchip,rk3188-cru";
60 clocks = <&cru SCLK_UART0>;
Drockchip,px30-cru.txt9 - compatible: PMU for CRU should be "rockchip,px30-pmu-cru"
10 - compatible: CRU should be "rockchip,px30-cru"
16 - "xin24m" for both PMUCRU and CRU
17 - "gpll" for CRU (sourced from PMUCRU)
28 preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be
51 cru: clock-controller@ff2b0000 {
52 compatible = "rockchip,px30-cru";
Drockchip,rk3399-cru.txt9 - compatible: PMU for CRU should be "rockchip,rk3399-pmucru"
10 - compatible: CRU should be "rockchip,rk3399-cru"
24 preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be
50 cru: clock-controller@ff760000 {
51 compatible = "rockchip,rk3399-cru";
63 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
Drockchip,rk3308-cru.txt9 - compatible: CRU should be "rockchip,rk3308-cru"
22 preprocessor macros in the dt-bindings/clock/rk3308-cru.h headers and can be
40 cru: clock-controller@ff500000 {
41 compatible = "rockchip,rk3308-cru";
55 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
Drockchip,rk3288-cru.txt14 - compatible: should be "rockchip,rk3288-cru" or "rockchip,rk3288w-cru" in
28 preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be
48 cru: cru@20000000 {
49 compatible = "rockchip,rk3188-cru";
66 clocks = <&cru SCLK_UART0>;
Drockchip,rk3036-cru.txt9 - compatible: should be "rockchip,rk3036-cru"
22 preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be
37 cru: cru@20000000 {
38 compatible = "rockchip,rk3036-cru";
55 clocks = <&cru SCLK_UART0>;
/Linux-v5.10/Documentation/devicetree/bindings/pci/
Drockchip-pcie-ep.txt45 clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
46 <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
53 resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
54 <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> ,
55 <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>;
Drockchip-pcie-host.txt85 clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
86 <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
94 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
95 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
104 resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
105 <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> ,
106 <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>;
/Linux-v5.10/Documentation/devicetree/bindings/usb/
Drockchip,dwc3.txt26 clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
27 <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
43 clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
44 <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>;
/Linux-v5.10/Documentation/devicetree/bindings/media/
Drockchip-rga.yaml67 #include <dt-bindings/clock/rk3399-cru.h>
74 clocks = <&cru ACLK_RGA>,
75 <&cru HCLK_RGA>,
76 <&cru SCLK_RGA_CORE>;
79 resets = <&cru SRST_RGA_CORE>,
80 <&cru SRST_A_RGA>,
81 <&cru SRST_H_RGA>;

123456