Lines Matching full:cru
7 #include <dt-bindings/clock/rk3308-cru.h>
46 clocks = <&cru ARMCLK>;
197 clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
210 clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
223 clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
236 clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
249 clocks = <&cru PCLK_WDT>;
258 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
271 clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
284 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
297 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
310 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
325 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
340 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
355 clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
367 clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
378 clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
389 clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
400 clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
411 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
422 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
433 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
444 clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
455 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
466 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
477 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
488 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
500 clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER0>;
508 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
511 resets = <&cru SRST_SARADC_P>;
528 clocks = <&cru ACLK_DMAC0>;
539 clocks = <&cru ACLK_DMAC1>;
549 clocks = <&cru SCLK_I2S0_2CH>, <&cru HCLK_I2S0_2CH>;
553 resets = <&cru SRST_I2S0_2CH_M>, <&cru SRST_I2S0_2CH_H>;
567 clocks = <&cru SCLK_I2S1_2CH>, <&cru HCLK_I2S1_2CH>;
571 resets = <&cru SRST_I2S1_2CH_M>, <&cru SRST_I2S1_2CH_H>;
580 clocks = <&cru SCLK_SPDIF_TX>, <&cru HCLK_SPDIFTX>;
594 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
595 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
609 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
610 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
622 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
623 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
632 cru: clock-controller@ff500000 { label
633 compatible = "rockchip,rk3308-cru";
639 assigned-clocks = <&cru SCLK_RTC32K>;
684 clocks = <&cru PCLK_GPIO0>;
695 clocks = <&cru PCLK_GPIO1>;
706 clocks = <&cru PCLK_GPIO2>;
717 clocks = <&cru PCLK_GPIO3>;
728 clocks = <&cru PCLK_GPIO4>;