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/Linux-v6.1/arch/xtensa/variants/de212/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 #define XCHAL_CP_NUM 0 /* number of coprocessors */
36 #define XCHAL_CP_MAX 0 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
59 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
[all …]
/Linux-v6.1/arch/xtensa/variants/csp/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x80 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
43 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
45 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
48 #define XCHAL_CP0_SA_SIZE 0
50 #define XCHAL_CP1_SA_SIZE 0
52 #define XCHAL_CP2_SA_SIZE 0
[all …]
/Linux-v6.1/arch/xtensa/variants/test_kc705_be/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x82 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
45 #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */
48 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
50 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
53 #define XCHAL_CP0_SA_SIZE 0
55 #define XCHAL_CP2_SA_SIZE 0
[all …]
/Linux-v6.1/arch/xtensa/variants/test_kc705_hifi/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x82 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
45 #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */
48 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
50 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
53 #define XCHAL_CP0_SA_SIZE 0
55 #define XCHAL_CP2_SA_SIZE 0
[all …]
/Linux-v6.1/tools/testing/selftests/kvm/aarch64/
Dget-reg-list.c1 // SPDX-License-Identifier: GPL-2.0
9 * list new registers with get-reg-list. We assume they'll be unused, at
13 * a regression in get-reg-list. This test checks for that regression by
17 * by running the test with the --list command line argument.
23 * from guests"). Also, one must use the --core-reg-fixup command line
60 for ((s) = &(c)->sublists[0]; (s)->regs; ++(s))
63 for ((i) = 0; (i) < reg_list->n; ++(i))
67 if (!filter_reg(reg_list->reg[i]))
70 for ((i) = 0; (i) < blessed_n; ++(i)) \
71 if (!find_reg(reg_list->reg, reg_list->n, blessed_reg[i]))
[all …]
/Linux-v6.1/drivers/mtd/nand/raw/
Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #define LP_OPTIONS 0
20 * If page size and eraseblock size are 0, the sizes are taken from the
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
30 { .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} },
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
33 { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
[all …]
/Linux-v6.1/drivers/staging/vt6655/
Drf.c1 // SPDX-License-Identifier: GPL-2.0+
13 * IFRFbWriteEmbedded - Embedded write RF register via MAC
37 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
38 0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
39 0x01A00200 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
40 0x00FFF300 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
41 0x0005A400 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
42 0x0F4DC500 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
43 0x0805B600 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
44 0x0146C700 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
[all …]
/Linux-v6.1/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
29 #define Op0_mask 0x3
31 #define Op1_mask 0x7
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/net/
Dmdio-mux-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
17 - $ref: /schemas/net/mdio-mux.yaml#
21 const: mdio-mux-gpio
30 - compatible
31 - gpios
36 - |
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/skylakex/
Duncore-memory.json4 "Counter": "0,1,2,3",
5 "EventCode": "0x1",
8 "UMask": "0x2",
13 "Counter": "0,1,2,3",
14 "EventCode": "0x4",
17 "UMask": "0x1",
22 "Counter": "0,1,2,3",
23 "EventCode": "0x4",
26 "UMask": "0x2",
31 "Counter": "0,1,2,3",
[all …]
Dpipeline.json3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
7 "EventCode": "0x14",
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
17 "EventCode": "0xC4",
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3",
[all …]
Dcache.json4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0x51",
8 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
16 "EventCode": "0x48",
20 "UMask": "0x2"
24 "Counter": "0,1,2,3",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/sandybridge/
Dpipeline.json3 …ressing of the format [base + offset], 2. the offset is between 1 and 2047, 3. the address specifi…
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0xB6",
9 "UMask": "0x1"
13 "Counter": "0,1,2,3",
14 "CounterHTOff": "0,1,2,3,4,5,6,7",
17 "EventCode": "0x14",
21 "UMask": "0x1"
25 "Counter": "0,1,2,3",
[all …]
Dcache.json4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0x51",
9 "UMask": "0x2"
13 "Counter": "0,1,2,3",
14 "CounterHTOff": "0,1,2,3,4,5,6,7",
15 "EventCode": "0x51",
18 "UMask": "0x8"
22 "Counter": "0,1,2,3",
23 "CounterHTOff": "0,1,2,3,4,5,6,7",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/cascadelakex/
Duncore-memory.json4 "Counter": "0,1,2,3",
5 "EventCode": "0x1",
8 "UMask": "0x2",
13 "Counter": "0,1,2,3",
14 "EventCode": "0x4",
17 "UMask": "0x1",
22 "Counter": "0,1,2,3",
23 "EventCode": "0x4",
26 "UMask": "0x2",
31 "Counter": "0,1,2,3",
[all …]
Dpipeline.json3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
7 "EventCode": "0x14",
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
17 "EventCode": "0xC4",
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/haswellx/
Dpipeline.json4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0x14",
9 "UMask": "0x2"
13 "Counter": "0,1,2,3",
14 "CounterHTOff": "0,1,2,3,4,5,6,7",
15 "EventCode": "0x88",
19 "UMask": "0xff"
22 "BriefDescription": "Speculative and retired macro-conditional branches.",
23 "Counter": "0,1,2,3",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/haswell/
Dpipeline.json4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0x14",
9 "UMask": "0x2"
13 "Counter": "0,1,2,3",
14 "CounterHTOff": "0,1,2,3,4,5,6,7",
15 "EventCode": "0x88",
19 "UMask": "0xff"
22 "BriefDescription": "Speculative and retired macro-conditional branches.",
23 "Counter": "0,1,2,3",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/jaketown/
Dpipeline.json3 …ressing of the format [base + offset], 2. the offset is between 1 and 2047, 3. the address specifi…
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0xB6",
9 "UMask": "0x1"
13 "Counter": "0,1,2,3",
14 "CounterHTOff": "0,1,2,3,4,5,6,7",
17 "EventCode": "0x14",
21 "UMask": "0x1"
25 "Counter": "0,1,2,3",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/ivybridge/
Dpipeline.json4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
8 "EventCode": "0x14",
12 "UMask": "0x4"
16 "Counter": "0,1,2,3",
17 "CounterHTOff": "0,1,2,3,4,5,6,7",
18 "EventCode": "0x14",
22 "UMask": "0x1"
26 "Counter": "0,1,2,3",
27 "CounterHTOff": "0,1,2,3,4,5,6,7",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/ivytown/
Dpipeline.json4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
8 "EventCode": "0x14",
12 "UMask": "0x4"
16 "Counter": "0,1,2,3",
17 "CounterHTOff": "0,1,2,3,4,5,6,7",
18 "EventCode": "0x14",
22 "UMask": "0x1"
26 "Counter": "0,1,2,3",
27 "CounterHTOff": "0,1,2,3,4,5,6,7",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/broadwellde/
Dpipeline.json4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0x14",
8 …: "This event counts the number of the divide operations executed. Uses edge-detect and a cmask va…
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
16 "EventCode": "0x88",
20 "UMask": "0xff"
23 "BriefDescription": "Speculative and retired macro-conditional branches",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/broadwell/
Dpipeline.json4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0x14",
8 …: "This event counts the number of the divide operations executed. Uses edge-detect and a cmask va…
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
16 "EventCode": "0x88",
20 "UMask": "0xff"
23 "BriefDescription": "Speculative and retired macro-conditional branches",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/broadwellx/
Dpipeline.json4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
6 "EventCode": "0x14",
8 …: "This event counts the number of the divide operations executed. Uses edge-detect and a cmask va…
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
16 "EventCode": "0x88",
20 "UMask": "0xff"
23 "BriefDescription": "Speculative and retired macro-conditional branches",
[all …]
/Linux-v6.1/tools/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 * [20-19] : Op0
20 * [18-16] : Op1
21 * [15-12] : CRn
22 * [11-8] : CRm
23 * [7-5] : Op2
26 #define Op0_mask 0x3
28 #define Op1_mask 0x7
30 #define CRn_mask 0xf
32 #define CRm_mask 0xf
[all …]

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