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1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Andrew Lunn <andrew@lunn.ch>
17   - $ref: /schemas/net/mdio-mux.yaml#
21     const: mdio-mux-gpio
30   - compatible
31   - gpios
36   - |
38      An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a
39      pair of GPIO lines.  Child busses 2 and 3 populated with 4
42     mdio-mux {
43         compatible = "mdio-mux-gpio";
44         gpios = <&gpio1 3 0>, <&gpio1 4 0>;
45         mdio-parent-bus = <&smi1>;
46         #address-cells = <1>;
47         #size-cells = <0>;
51             #address-cells = <1>;
52             #size-cells = <0>;
54             ethernet-phy@1 {
56                 marvell,reg-init = <3 0x10 0 0x5777>,
57                   <3 0x11 0 0x00aa>,
58                   <3 0x12 0 0x4105>,
59                   <3 0x13 0 0x0a60>;
60                 interrupt-parent = <&gpio>;
63             ethernet-phy@2 {
65                 marvell,reg-init = <3 0x10 0 0x5777>,
66                   <3 0x11 0 0x00aa>,
67                   <3 0x12 0 0x4105>,
68                   <3 0x13 0 0x0a60>;
69                 interrupt-parent = <&gpio>;
72             ethernet-phy@3 {
73                 reg = <3>;
74                 marvell,reg-init = <3 0x10 0 0x5777>,
75                   <3 0x11 0 0x00aa>,
76                   <3 0x12 0 0x4105>,
77                   <3 0x13 0 0x0a60>;
78                 interrupt-parent = <&gpio>;
81             ethernet-phy@4 {
83                 marvell,reg-init = <3 0x10 0 0x5777>,
84                   <3 0x11 0 0x00aa>,
85                   <3 0x12 0 0x4105>,
86                   <3 0x13 0 0x0a60>;
87                 interrupt-parent = <&gpio>;
92         mdio@3 {
93             reg = <3>;
94             #address-cells = <1>;
95             #size-cells = <0>;
97             ethernet-phy@1 {
99                 marvell,reg-init = <3 0x10 0 0x5777>,
100                   <3 0x11 0 0x00aa>,
101                   <3 0x12 0 0x4105>,
102                   <3 0x13 0 0x0a60>;
103                 interrupt-parent = <&gpio>;
106             ethernet-phy@2 {
108                 marvell,reg-init = <3 0x10 0 0x5777>,
109                   <3 0x11 0 0x00aa>,
110                   <3 0x12 0 0x4105>,
111                   <3 0x13 0 0x0a60>;
112                 interrupt-parent = <&gpio>;
115             ethernet-phy@3 {
116                 reg = <3>;
117                 marvell,reg-init = <3 0x10 0 0x5777>,
118                   <3 0x11 0 0x00aa>,
119                   <3 0x12 0 0x4105>,
120                   <3 0x13 0 0x0a60>;
121                 interrupt-parent = <&gpio>;
124             ethernet-phy@4 {
126                 marvell,reg-init = <3 0x10 0 0x5777>,
127                   <3 0x11 0 0x00aa>,
128                   <3 0x12 0 0x4105>,
129                   <3 0x13 0 0x0a60>;
130                 interrupt-parent = <&gpio>;