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Searched refs:clkctl (Results 1 – 18 of 18) sorted by relevance

/Zephyr-latest/soc/intel/intel_adsp/common/include/
Dadsp_clk.h42 #define ADSP_CLKCTL CAVS_SHIM.clkctl
45 #define ADSP_CPU_CLOCK_FREQ_ENC DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_freq_enc)
46 #define ADSP_CPU_CLOCK_FREQ_MASK DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_freq_mask)
47 #define ADSP_CPU_CLOCK_FREQ_LEN DT_PROP_LEN(DT_NODELABEL(clkctl), adsp_clkctl_freq_enc)
49 #define ADSP_CPU_CLOCK_FREQ_DEFAULT DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_freq_default)
50 #define ADSP_CPU_CLOCK_FREQ_LOWEST DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_freq_lowest)
52 #define ADSP_CPU_CLOCK_FREQ(name) DT_PROP(DT_NODELABEL(clkctl), adsp_clkctl_clk_##name)
54 #define ADSP_CLOCK_HAS_WOVCRO DT_PROP(DT_NODELABEL(clkctl), wovcro_supported)
/Zephyr-latest/soc/intel/intel_adsp/common/
Dclk.c105 CAVS_SHIM.clkctl |= CAVS_CLKCTL_WOVCRO; in adsp_clock_init()
106 if (CAVS_SHIM.clkctl & CAVS_CLKCTL_WOVCRO) { in adsp_clock_init()
107 CAVS_SHIM.clkctl = CAVS_SHIM.clkctl & ~CAVS_CLKCTL_WOVCRO; in adsp_clock_init()
/Zephyr-latest/dts/xtensa/intel/
Dintel_adsp_cavs25_tgph.dtsi75 clkctl: clkctl { label
76 compatible = "intel,adsp-shim-clkctl";
77 adsp-clkctl-clk-wovcro = <0>;
78 adsp-clkctl-clk-lpro = <1>;
79 adsp-clkctl-clk-hpro = <2>;
80 adsp-clkctl-freq-enc = <0x1a 0x20000002 0x80000002>;
81 adsp-clkctl-freq-mask = <0x10 0x20000000 0x80000000>;
82 adsp-clkctl-freq-default = <2>;
83 adsp-clkctl-freq-lowest = <0>;
Dintel_adsp_cavs25.dtsi90 clkctl: clkctl { label
91 compatible = "intel,adsp-shim-clkctl";
92 adsp-clkctl-clk-wovcro = <0>;
93 adsp-clkctl-clk-lpro = <1>;
94 adsp-clkctl-clk-hpro = <2>;
95 adsp-clkctl-freq-enc = <0x1a 0x20000002 0x80000002>;
96 adsp-clkctl-freq-mask = <0x10 0x20000000 0x80000000>;
97 adsp-clkctl-freq-default = <2>;
98 adsp-clkctl-freq-lowest = <0>;
Dintel_adsp_ace20_lnl.dtsi96 clkctl: clkctl { label
97 compatible = "intel,adsp-shim-clkctl";
98 adsp-clkctl-clk-wovcro = <0>;
99 adsp-clkctl-clk-ipll = <1>;
100 adsp-clkctl-freq-enc = <0xc 0x4>;
101 adsp-clkctl-freq-mask = <0x0 0x0>;
102 adsp-clkctl-freq-default = <1>;
103 adsp-clkctl-freq-lowest = <0>;
Dintel_adsp_ace15_mtpm.dtsi82 clkctl: clkctl { label
83 compatible = "intel,adsp-shim-clkctl";
84 adsp-clkctl-clk-wovcro = <0>;
85 adsp-clkctl-clk-ipll = <1>;
86 adsp-clkctl-freq-enc = <0xc 0x4>;
87 adsp-clkctl-freq-mask = <0x0 0x0>;
88 adsp-clkctl-freq-default = <1>;
89 adsp-clkctl-freq-lowest = <0>;
Dintel_adsp_ace30.dtsi96 clkctl: clkctl { label
97 compatible = "intel,adsp-shim-clkctl";
98 adsp-clkctl-clk-wovcro = <0>;
99 adsp-clkctl-clk-ipll = <1>;
100 adsp-clkctl-freq-enc = <0xc 0x4>;
101 adsp-clkctl-freq-mask = <0x0 0x0>;
102 adsp-clkctl-freq-default = <1>;
103 adsp-clkctl-freq-lowest = <0>;
Dintel_adsp_ace30_ptl.dtsi96 clkctl: clkctl { label
97 compatible = "intel,adsp-shim-clkctl";
98 adsp-clkctl-clk-wovcro = <0>;
99 adsp-clkctl-clk-ipll = <1>;
100 adsp-clkctl-freq-enc = <0xc 0x4>;
101 adsp-clkctl-freq-mask = <0x0 0x0>;
102 adsp-clkctl-freq-default = <1>;
103 adsp-clkctl-freq-lowest = <0>;
/Zephyr-latest/soc/intel/intel_adsp/cavs/
Dpower.c248 CAVS_SHIM.clkctl |= CAVS_CLKCTL_RHROSCC; in power_init()
249 while ((CAVS_SHIM.clkctl & CAVS_CLKCTL_RHROSCC) != CAVS_CLKCTL_RHROSCC) { in power_init()
260 CAVS_SHIM.clkctl = (CAVS_CLKCTL_RHROSCC | in power_init()
Dmultiprocessing.c102 CAVS_SHIM.clkctl |= CAVS_CLKCTL_TCPLCG(cpu_num); in soc_start_core()
229 CAVS_SHIM.clkctl &= ~CAVS_CLKCTL_TCPLCG(id); in soc_adsp_halt_cpu()
/Zephyr-latest/drivers/clock_control/
Dclock_control_adsp.c31 DEVICE_DT_DEFINE(DT_NODELABEL(clkctl), cavs_clock_ctrl_init, NULL,
/Zephyr-latest/tests/drivers/clock_control/adsp_clock/src/
Dmain.c41 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(clkctl)); in ZTEST()
/Zephyr-latest/soc/intel/intel_adsp/cavs/include/cavs25/
Dadsp_shim.h28 uint32_t clkctl; member
/Zephyr-latest/dts/arm/nxp/
Dnxp_rw6xx_common.dtsi121 clkctl0: clkctl@1000 {
134 clkctl1: clkctl@21000 {
Dnxp_rt6xx_common.dtsi106 clkctl0: clkctl@1000 {
121 clkctl1: clkctl@21000 {
Dnxp_rt5xx_common.dtsi126 clkctl0: clkctl@1000 {
141 clkctl1: clkctl@21000 {
/Zephyr-latest/doc/releases/
Drelease-notes-3.5.rst1348 * :dtcompatible:`intel,adsp-shim-clkctl`:
1350 * new property: ``adsp-clkctl-clk-ipll``
Drelease-notes-3.2.rst1101 * :dtcompatible:`intel,adsp-shim-clkctl`
1239 * :dtcompatible:`intel,adsp-shim-clkctl`: new ``wovcro-supported`` property.