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/hal_espressif-latest/components/bt/porting/npl/freertos/src/
Dnpl_os_freertos.c177 IRAM_ATTR npl_freertos_callout_mem_reset(struct ble_npl_callout *co) in npl_freertos_callout_mem_reset() argument
179 struct ble_npl_callout_freertos *callout = (struct ble_npl_callout_freertos *)co->co; in npl_freertos_callout_mem_reset()
640 npl_freertos_callout_init(struct ble_npl_callout *co, struct ble_npl_eventq *evq, in npl_freertos_callout_init() argument
646 if (!os_memblock_from(&ble_freertos_co_pool, co->co)) { in npl_freertos_callout_init()
647 co->co = os_memblock_get(&ble_freertos_co_pool); in npl_freertos_callout_init()
648 callout = (struct ble_npl_callout_freertos *)co->co; in npl_freertos_callout_init()
666 co->co = NULL; in npl_freertos_callout_init()
675 co->co = NULL; in npl_freertos_callout_init()
680 callout = (struct ble_npl_callout_freertos *)co->co; in npl_freertos_callout_init()
687 if(!co->co) { in npl_freertos_callout_init()
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/hal_espressif-latest/components/bt/porting/npl/freertos/include/nimble/
Dnimble_npl_os.h61 void *co; member
264 IRAM_ATTR ble_npl_callout_init(struct ble_npl_callout *co, struct ble_npl_eventq *evq, in ble_npl_callout_init() argument
267 return npl_funcs->p_ble_npl_callout_init(co, evq, ev_cb, ev_arg); in ble_npl_callout_init()
271 IRAM_ATTR ble_npl_callout_deinit(struct ble_npl_callout *co) in ble_npl_callout_deinit() argument
273 return npl_funcs->p_ble_npl_callout_deinit(co); in ble_npl_callout_deinit()
277 IRAM_ATTR ble_npl_callout_reset(struct ble_npl_callout *co, ble_npl_time_t ticks) in ble_npl_callout_reset() argument
279 return npl_funcs->p_ble_npl_callout_reset(co, ticks); in ble_npl_callout_reset()
283 IRAM_ATTR ble_npl_callout_stop(struct ble_npl_callout *co) in ble_npl_callout_stop() argument
285 return npl_funcs->p_ble_npl_callout_stop(co); in ble_npl_callout_stop()
289 IRAM_ATTR ble_npl_callout_is_active(struct ble_npl_callout *co) in ble_npl_callout_is_active() argument
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Dnpl_freertos.h92 int npl_freertos_callout_init(struct ble_npl_callout *co,
96 void npl_freertos_callout_deinit(struct ble_npl_callout *co);
98 void npl_freertos_callout_stop(struct ble_npl_callout *co);
100 bool npl_freertos_callout_is_active(struct ble_npl_callout *co);
102 ble_npl_time_t npl_freertos_callout_get_ticks(struct ble_npl_callout *co);
104 ble_npl_error_t npl_freertos_callout_reset(struct ble_npl_callout *co,
107 ble_npl_time_t npl_freertos_callout_remaining_ticks(struct ble_npl_callout *co,
Dnimble_npl.h111 int ble_npl_callout_init(struct ble_npl_callout *co, struct ble_npl_eventq *evq,
114 ble_npl_error_t ble_npl_callout_reset(struct ble_npl_callout *co,
117 void ble_npl_callout_stop(struct ble_npl_callout *co);
119 bool ble_npl_callout_is_active(struct ble_npl_callout *co);
121 ble_npl_time_t ble_npl_callout_get_ticks(struct ble_npl_callout *co);
123 ble_npl_time_t ble_npl_callout_remaining_ticks(struct ble_npl_callout *co,
126 void ble_npl_callout_set_arg(struct ble_npl_callout *co,
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dtwai_ll.h726 hw->clock_divider_reg.co = 0; in twai_ll_set_clkout()
730 hw->clock_divider_reg.co = 0; in twai_ll_set_clkout()
733 hw->clock_divider_reg.co = 1; in twai_ll_set_clkout()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dtwai_ll.h726 hw->clock_divider_reg.co = 0; in twai_ll_set_clkout()
730 hw->clock_divider_reg.co = 0; in twai_ll_set_clkout()
733 hw->clock_divider_reg.co = 1; in twai_ll_set_clkout()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dtwai_ll.h726 hw->clock_divider_reg.co = 0; in twai_ll_set_clkout()
730 hw->clock_divider_reg.co = 0; in twai_ll_set_clkout()
733 hw->clock_divider_reg.co = 1; in twai_ll_set_clkout()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dtwai_ll.h824 hw->clock_divider_reg.co = 0; in twai_ll_set_clkout()
828 hw->clock_divider_reg.co = 0; in twai_ll_set_clkout()
831 hw->clock_divider_reg.co = 1; in twai_ll_set_clkout()
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dtwai_struct.h194 uint32_t co: 1; /* CDR.8 CLKOUT enable/disable */ member
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dtwai_struct.h195 uint32_t co: 1; /* CDR.8 CLKOUT enable/disable */ member
/hal_espressif-latest/components/soc/esp32/include/soc/
Dtwai_struct.h192 uint32_t co: 1; /* CDR.3 CLKOUT enable/disable */ member
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dtwai_struct.h193 uint32_t co: 1; /* CDR.8 CLKOUT enable/disable */ member
/hal_espressif-latest/tools/esptool_py/docs/en/espefuse/inc/
Dsummary_ESP32-C2.rst18 …LOCK0) Set this bit to force ROM code to send a resume co = False R/W (0b0)
Dsummary_ESP32-C3.rst47 …LOCK0) Set this bit to force ROM code to send a resume co = False R/W (0b0)
Dsummary_ESP32-S3.rst36 …LOCK0) Set this bit to force ROM code to send a resume co = False R/W (0b0)
/hal_espressif-latest/components/esp_system/ld/esp32s2/
Dmemory.ld.in91 Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
/hal_espressif-latest/components/esp_system/ld/esp32s3/
Dmemory.ld.in106 * Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
/hal_espressif-latest/components/esp_system/ld/esp32/
Dmemory.ld.in107 Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.