1.. code-block:: none
2
3    > espefuse.py -p PORT summary
4
5    Connecting...................
6    Detecting chip type... ESP32-C2
7
8    === Run "summary" command ===
9    EFUSE_NAME (Block) Description  = [Meaningful Value] [Readable/Writeable] (Hex Value)
10    ----------------------------------------------------------------------------------------
11    Config fuses:
12    WR_DIS (BLOCK0)                                    Disable programming of individual eFuses           = 0 R/W (0x00)
13    RD_DIS (BLOCK0)                                    Disable reading from BlOCK3                        = 0 R/W (0b00)
14    UART_PRINT_CONTROL (BLOCK0)                        Set the default UARTboot message output mode       = Enable R/W (0b00)
15    DIS_DIRECT_BOOT (BLOCK0)                           This bit set means disable direct_boot mode        = False R/W (0b0)
16
17    Flash fuses:
18    FORCE_SEND_RESUME (BLOCK0)                         Set this bit to force ROM code to send a resume co = False R/W (0b0)
19                                                       mmand during SPI boot
20    FLASH_TPUW (BLOCK0)                                Configures flash waiting time after power-up; in u = 0 R/W (0x0)
21                                                       nit of ms. If the value is less than 15; the waiti
22                                                       ng time is the configurable value.  Otherwise; the
23                                                        waiting time is twice the configurable value
24
25    Identity fuses:
26    DISABLE_WAFER_VERSION_MAJOR (BLOCK0)               Disables check of wafer version major              = False R/W (0b0)
27    DISABLE_BLK_VERSION_MAJOR (BLOCK0)                 Disables check of blk version major                = False R/W (0b0)
28    WAFER_VERSION_MINOR (BLOCK2)                       WAFER_VERSION_MINOR                                = 0 R/W (0x0)
29    WAFER_VERSION_MAJOR (BLOCK2)                       WAFER_VERSION_MAJOR                                = 1 R/W (0b01)
30    PKG_VERSION (BLOCK2)                               EFUSE_PKG_VERSION                                  = 1 R/W (0b001)
31    BLK_VERSION_MINOR (BLOCK2)                         Minor version of BLOCK2                            = No calib R/W (0b000)
32    BLK_VERSION_MAJOR (BLOCK2)                         Major version of BLOCK2                            = 0 R/W (0b00)
33
34    Jtag fuses:
35    DIS_PAD_JTAG (BLOCK0)                              Set this bit to disable pad jtag                   = False R/W (0b0)
36
37    Mac fuses:
38    CUSTOM_MAC_USED (BLOCK0)                           True if MAC_CUSTOM is burned                       = False R/W (0b0)
39    CUSTOM_MAC (BLOCK1)                                Custom MAC address
40    = 00:00:00:00:00:00 (OK) R/W
41    MAC (BLOCK2)                                       MAC address
42    = 10:97:bd:f0:e5:28 (OK) R/W
43
44    Security fuses:
45    DIS_DOWNLOAD_ICACHE (BLOCK0)                       The bit be set to disable icache in download mode  = False R/W (0b0)
46    DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0)               The bit be set to disable manual encryption        = False R/W (0b0)
47    SPI_BOOT_CRYPT_CNT (BLOCK0)                        Enables flash encryption when 1 or 3 bits are set  = Disable R/W (0b000)
48                                                       and disables otherwise
49    XTS_KEY_LENGTH_256 (BLOCK0)                        Flash encryption key length                        = 128 bits key R/W (0b0)
50    DIS_DOWNLOAD_MODE (BLOCK0)                         Set this bit to disable download mode (boot_mode[3 = False R/W (0b0)
51                                                       :0] = 0; 1; 2; 4; 5; 6; 7)
52    ENABLE_SECURITY_DOWNLOAD (BLOCK0)                  Set this bit to enable secure UART download mode   = False R/W (0b0)
53    SECURE_BOOT_EN (BLOCK0)                            The bit be set to enable secure boot               = False R/W (0b0)
54    SECURE_VERSION (BLOCK0)                            Secure version for anti-rollback                   = 0 R/W (0x0)
55    BLOCK_KEY0 (BLOCK3)                                BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryp
56    = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
57                                                    tion
58    BLOCK_KEY0_LOW_128 (BLOCK3)                        BLOCK_KEY0 - lower 128-bits. 128-bit key of Flash
59    = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
60                                                    Encryption
61    BLOCK_KEY0_HI_128 (BLOCK3)                         BLOCK_KEY0 - higher 128-bits. 128-bits key of Secu
62    = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
63                                                       re Boot
64
65    Wdt fuses:
66    WDT_DELAY_SEL (BLOCK0)                             RTC watchdog timeout threshold; in unit of slow cl = 40000 R/W (0b00)
67                                                       ock cycle
68