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Searched refs:mask (Results 776 – 800 of 837) sorted by relevance

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/Zephyr-latest/kernel/
DKconfig.smp65 restricted by its CPU mask to execute on a subset of all CPUs) may
/Zephyr-latest/dts/arm/renesas/ra/ra6/
Dr7fa6e10x.dtsi98 channel-available-mask = <0x31ff>;
/Zephyr-latest/boards/nordic/thingy53/
Dthingy53_nrf5340_common.dtsi69 gpio-map-mask = <0xffffffff 0xffffffc0>;
/Zephyr-latest/subsys/tracing/ctf/
Dctf_top.c823 void sys_port_trace_gpio_port_set_masked_raw_enter(const struct device *port, gpio_port_pins_t mask, in sys_port_trace_gpio_port_set_masked_raw_enter() argument
826 ctf_top_gpio_port_set_masked_raw_enter((uint32_t)(uintptr_t)port, (uint32_t)mask, in sys_port_trace_gpio_port_set_masked_raw_enter()
Dctf_top.h752 static inline void ctf_top_gpio_port_set_masked_raw_enter(uint32_t port, uint32_t mask, in ctf_top_gpio_port_set_masked_raw_enter() argument
755 CTF_EVENT(CTF_LITERAL(uint8_t, CTF_EVENT_GPIO_PORT_SET_MASKED_RAW_ENTER), port, mask, in ctf_top_gpio_port_set_masked_raw_enter()
/Zephyr-latest/drivers/adc/
Dadc_ads114s0x.c1303 int ads114s0x_gpio_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask, in ads114s0x_gpio_port_set_masked_raw() argument
1311 data->gpio_value = ((data->gpio_value & ~mask) | (mask & value)) & data->gpio_enabled & in ads114s0x_gpio_port_set_masked_raw()
/Zephyr-latest/dts/arm/renesas/ra/ra4/
Dr7fa4m2ax.dtsi100 channel-available-mask = <0x139ff>;
/Zephyr-latest/drivers/can/
Dcan_mcp2515.c43 uint8_t mask, in mcp2515_cmd_bit_modify() argument
48 uint8_t cmd_buf[] = { MCP2515_OPCODE_BIT_MODIFY, reg_addr, mask, data }; in mcp2515_cmd_bit_modify()
Dcan_shell.c918 filter.mask = val; in cmd_can_filter_add()
929 (filter.flags & CAN_FILTER_IDE) != 0 ? 8 : 3, filter.mask); in cmd_can_filter_add()
Dcan_xmc4xxx.c303 mo->MOAMR |= FIELD_PREP(CAN_MO_MOAMR_AM_Msk, filter->mask) | CAN_MO_MOAMR_MIDE_Msk; in can_xmc4xxx_init_fifo()
306 mo->MOAMR |= FIELD_PREP(XMC_CAN_MO_MOAR_STDID_Msk, filter->mask); in can_xmc4xxx_init_fifo()
/Zephyr-latest/tests/subsys/fs/zms/src/
Dmain.c693 uint64_t mask = compare_sector_only ? ADDR_SECT_MASK : UINT64_MAX; in num_matching_cache_entries() local
696 if ((fs->lookup_cache[i] & mask) == addr) { in num_matching_cache_entries()
/Zephyr-latest/dts/arm/renesas/ra/ra8/
Dra8x1.dtsi290 channel-available-mask = <0xf01f7>;
302 channel-available-mask = <0x7f0077>;
/Zephyr-latest/drivers/spi/
Dspi_ambiq_spic.c498 sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
/Zephyr-latest/dts/arm/ambiq/
Dambiq_apollo4p_blue.dtsi350 gpio-map-mask = <0xffffffe0 0xffffffc0>;
Dambiq_apollo3_blue.dtsi384 gpio-map-mask = <0xffffffe0 0xffffffc0>;
Dambiq_apollo4p.dtsi367 gpio-map-mask = <0xffffffe0 0xffffffc0>;
/Zephyr-latest/dts/xtensa/intel/
Dintel_adsp_cavs25_tgph.dtsi81 adsp-clkctl-freq-mask = <0x10 0x20000000 0x80000000>;
/Zephyr-latest/boards/nxp/mimxrt685_evk/
Dmimxrt685_evk_mimxrt685s_cm33.dts102 gpio-map-mask = <0xffffffff 0xffffffc0>;
/Zephyr-latest/doc/build/dts/
Dphandles.rst169 bit mask describing pin metadata (for example ``(GPIO_ACTIVE_LOW |
288 #. a bit mask of flags related to the pin
/Zephyr-latest/tests/subsys/fs/nvs/src/
Dmain.c762 uint32_t mask = compare_sector_only ? ADDR_SECT_MASK : UINT32_MAX; in num_matching_cache_entries() local
765 if ((fs->lookup_cache[i] & mask) == addr) { in num_matching_cache_entries()
/Zephyr-latest/dts/common/nordic/
Dnrf9280.dtsi69 nordic,tasks-mask = <0x0000fff0>;
426 nordic,tasks-mask = <0xfffff0ff>;
546 nordic,tasks-mask = <0x0000fff0>;
/Zephyr-latest/drivers/sensor/st/lsm6dsl/
Dlsm6dsl.h640 uint8_t mask, uint8_t value);
/Zephyr-latest/drivers/serial/
Duart_esp32.c166 uint32_t mask = uart_hal_get_intsts_mask(&data->hal); in uart_esp32_err_check() local
167 uint32_t err = mask & (UART_INTR_PARITY_ERR | UART_INTR_FRAM_ERR); in uart_esp32_err_check()
/Zephyr-latest/subsys/bluetooth/host/classic/
Dl2cap_br.c579 uint8_t mask = 0U; in get_fixed_channels_mask() local
583 mask |= BIT(fchan->cid); in get_fixed_channels_mask()
586 return mask; in get_fixed_channels_mask()
/Zephyr-latest/drivers/i3c/
Di3c_npcx.c344 static inline void npcx_i3c_interrupt_enable(struct i3c_reg *inst, uint32_t mask) in npcx_i3c_interrupt_enable() argument
346 inst->MINTSET = mask; in npcx_i3c_interrupt_enable()
385 uint32_t mask = I3C_STATUS_CLR_MASK; in npcx_i3c_status_clear_all() local
387 inst->MSTATUS = mask; in npcx_i3c_status_clear_all()

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