Searched refs:driven (Results 101 – 125 of 191) sorted by relevance
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| /Zephyr-latest/boards/st/stm32n6570_dk/doc/ |
| D | index.rst | 102 STM32N6570_DK System Clock could be driven by internal or external oscillator,
103 as well as main PLL clock. By default System clock is driven by PLL clock at
104 400MHz, driven by 64MHz high speed internal oscillator.
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| /Zephyr-latest/boards/st/nucleo_h755zi_q/doc/ |
| D | index.rst | 100 Nucleo H755ZI-Q System Clock can be driven by an internal or external
102 driven by the PLL clock at 480MHz, driven by an 8MHz high-speed external clock.
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| /Zephyr-latest/boards/renesas/rcar_spider_s4/doc/ |
| D | rcar_spider_a55.rst | 48 | UART | serial | interrupt-driven/polling |
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| /Zephyr-latest/samples/subsys/smf/hsm_psicc2/ |
| D | README.rst | 5 Implement an event-driven hierarchical state machine using State Machine Framework (SMF).
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| /Zephyr-latest/samples/basic/rgb_led/ |
| D | README.rst | 13 is driven by a PWM port where the pulse width is changed from zero to the period
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| /Zephyr-latest/boards/96boards/neonkey/doc/ |
| D | index.rst | 100 96Boards Neonkey can be driven by an internal oscillator as well as the main
101 PLL clock. By default System clock is sourced by PLL clock at 84MHz, driven
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| /Zephyr-latest/boards/st/stm32h7s78_dk/doc/ |
| D | index.rst | 190 STM32H7S78-DK System Clock could be driven by internal or external oscillator,
191 as well as main PLL clock. By default System clock is driven by PLL clock at
192 500MHz, driven by 24MHz external oscillator (HSE).
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| /Zephyr-latest/boards/st/nucleo_l552ze_q/doc/ |
| D | nucleol552ze_q.rst | 216 Nucleo L552ZE Q System Clock could be driven by internal or external oscillator,
217 as well as main PLL clock. By default System clock is driven by PLL clock at
218 110MHz, driven by 4MHz medium speed internal oscillator.
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| /Zephyr-latest/boards/st/nucleo_h745zi_q/doc/ |
| D | index.rst | 108 Nucleo H745ZI-Q System Clock could be driven by an internal or external
110 driven by the PLL clock at 480MHz, driven by an 8MHz high-speed external clock.
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| /Zephyr-latest/boards/st/nucleo_h7s3l8/doc/ |
| D | index.rst | 172 Nucleo H7S3L8 System Clock could be driven by an internal or external
174 driven by the PLL clock at 600MHz, driven by an 24MHz high-speed external clock.
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| /Zephyr-latest/boards/seeed/lora_e5_mini/doc/ |
| D | index.rst | 87 LoRa-E5 mini board System Clock could be driven by the low-power internal (MSI),
89 main PLL clock. By default System clock is driven by the MSI clock at 48MHz.
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| /Zephyr-latest/boards/weact/mini_stm32h7b0/doc/ |
| D | index.rst | 101 The STM32H7B0VB System Clock can be driven by an internal or external oscillator,
102 as well as by the main PLL clock. By default, the System clock is driven
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| /Zephyr-latest/boards/weact/stm32h5_core/doc/ |
| D | index.rst | 91 The STM32H562RG System Clock can be driven by an internal or external oscillator,
92 as well as by the main PLL clock. By default, the System clock is driven
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| /Zephyr-latest/boards/nordic/nrf9160dk/ |
| D | nrf9160dk_nrf52840.dts | 62 * Two pins (P1.12 and P0.12) need to be driven for
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| /Zephyr-latest/boards/st/stm32h573i_dk/doc/ |
| D | index.rst | 173 STM32H573I-DK System Clock could be driven by internal or external oscillator,
174 as well as main PLL clock. By default System clock is driven by PLL clock at
175 240MHz, driven by 25MHz external oscillator (HSE).
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| /Zephyr-latest/boards/st/stm32h747i_disco/doc/ |
| D | index.rst | 81 The STM32H747I System Clock can be driven by an internal or external oscillator,
83 is driven by the PLL clock at 400MHz, and the CPU2 (Cortex-M4) System clock
84 is driven at 200MHz. PLL clock is feed by a 25MHz high speed external clock.
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| /Zephyr-latest/boards/st/stm32l562e_dk/doc/ |
| D | index.rst | 209 STM32L562E-DK System Clock could be driven by internal or external oscillator,
210 as well as main PLL clock. By default System clock is driven by PLL clock at
211 110MHz, driven by 4MHz medium speed internal oscillator.
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| /Zephyr-latest/boards/st/nucleo_h533re/doc/ |
| D | index.rst | 178 Nucleo H533RE System Clock could be driven by internal or external oscillator,
179 as well as main PLL clock. By default System clock is driven by PLL clock at
180 240MHz, driven by an 24MHz high-speed external clock.
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| /Zephyr-latest/boards/st/nucleo_h563zi/doc/ |
| D | index.rst | 168 Nucleo H563ZI System Clock could be driven by internal or external oscillator,
169 as well as main PLL clock. By default System clock is driven by PLL clock at
170 240MHz, driven by 8MHz external clock provided from the STLINK-V3EC.
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| /Zephyr-latest/boards/st/nucleo_u5a5zj_q/doc/ |
| D | index.rst | 216 Nucleo U5A5ZJ Q System Clock could be driven by internal or external oscillator,
217 as well as main PLL clock. By default System clock is driven by PLL clock at
218 160MHz, driven by the 16MHz high speed oscillator.
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| /Zephyr-latest/drivers/serial/ |
| D | Kconfig | 140 Asynchronous to Interrupt driven adaptation layer. When enabled device
141 which implements only asynchronous API can be used with interrupt driven
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| /Zephyr-latest/boards/weact/mini_stm32h743/doc/ |
| D | index.rst | 100 The STM32H743VI System Clock can be driven by an internal or external oscillator,
101 as well as by the main PLL clock. By default, the System clock is driven
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| /Zephyr-latest/soc/atmel/sam/common/ |
| D | Kconfig | 18 will be driven by the internal fast RC oscillator running at 32 kHz.
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| /Zephyr-latest/boards/shields/x_nucleo_bnrg2a1/doc/ |
| D | index.rst | 35 This is not a problem as CS signal is software driven gpio on Arduino A1
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| /Zephyr-latest/doc/kernel/services/threads/ |
| D | nothread.rst | 9 * Simple event-driven applications
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