1.. zephyr:board:: nucleo_h755zi_q 2 3Overview 4******** 5 6The NUCLEO-H755ZI-Q board, based on the MB1363 reference board, provides an affordable and 7flexible way for users to try out new concepts and build prototypes on the STM32H755ZIT6 8microcontroller. 9 10The ST Zio connector, which extends the ARDUINO® Uno V3 connectivity, and 11the ST morpho headers provide an easy means of expanding the functionality of the Nucleo 12open development platform with a wide choice of specialized shields. 13The NUCLEO-H755ZI-Q board does not require any separate probe as it integrates 14the ST-LINK V3 debugger/programmer. 15 16Key Features 17 18- STM32H755ZIT6 microcontroller in LQFP144 package 19- Ethernet compliant with IEEE-802.3-2002 (depending on STM32 support) 20- USB OTG or full-speed device (depending on STM32 support) 21- 3 user LEDs 22- 2 user and reset push-buttons 23- 32.768 kHz crystal oscillator 24- Board connectors: 25 26 - USB with Micro-AB 27 - Ethernet RJ45 (depending on STM32 support) 28 - SWDST Zio connector including Arduino* Uno V3ST 29 - ST morpho expansion 30 31- Flexible power-supply options: ST-LINK USB VBUS or external sources 32- External or internal SMPS to generate Vcore logic supply 33- On-board ST-LINK/V3 debugger/programmer with USB re-enumeration 34- capability: mass storage, virtual COM port and debug port 35- USB OTG full speed or device only 36 37More information about the board can be found at the `Nucleo H755ZI-Q website`_. 38 39Hardware 40******** 41 42Nucleo H755ZI-Q provides the following hardware components: 43 44- STM32H755ZI in LQFP144 package 45- ARM 32-bit Cortex-M7 CPU with FPU 46- ARM 32-bit Cortex-M4 CPU with FPU 47- Chrom-ART Accelerator 48- Hardware JPEG Codec 49- 480 MHz max CPU frequency 50- VDD from 1.62 V to 3.6 V 51- 2 MB Flash 52- 1 MB SRAM 53- High-resolution timer (2.1 ns) 54- 32-bit timers(2) 55- 16-bit timers(12) 56- SPI(6) 57- I2C(4) 58- I2S (3) 59- USART(4) 60- UART(4) 61- USB OTG Full Speed and High Speed(1) 62- USB OTG Full Speed(1) 63- CAN-FD(2) 64- SAI(2) 65- SPDIF_Rx(4) 66- HDMI_CEC(1) 67- Dual Mode Quad SPI(1) 68- Camera Interface 69- GPIO (up to 114) with external interrupt capability 70- 16-bit ADC(3) with 36 channels / 3.6 MSPS 71- 12-bit DAC with 2 channels(2) 72- True Random Number Generator (RNG) 73- 16-channel DMA 74- LCD-TFT Controller with XGA resolution 75- CRYPT and HASH peripherals 76 77Supported Features 78================== 79 80The Zephyr nucleo_h755zi_q board configuration supports the following hardware 81features: 82 83+-------------+------------+-------------------------------------+ 84| Interface | Controller | Driver/Component | 85+=============+============+=====================================+ 86| NVIC | on-chip | nested vector interrupt controller | 87+-------------+------------+-------------------------------------+ 88| UART/USART | on-chip | serial port | 89+-------------+------------+-------------------------------------+ 90| PINMUX | on-chip | pinmux | 91+-------------+------------+-------------------------------------+ 92| GPIO | on-chip | gpio | 93+-------------+------------+-------------------------------------+ 94| RTC | on-chip | counter | 95+-------------+------------+-------------------------------------+ 96| I2C | on-chip | i2c | 97+-------------+------------+-------------------------------------+ 98| PWM | on-chip | pwm | 99+-------------+------------+-------------------------------------+ 100| ETHERNET | on-chip | ethernet | 101+-------------+------------+-------------------------------------+ 102| RNG | on-chip | True Random number generator | 103+-------------+------------+-------------------------------------+ 104| USB OTG FS | on-chip | USB device | 105+-------------+------------+-------------------------------------+ 106 107Other hardware features are not yet supported on this Zephyr port. 108 109The default configuration per core can be found in the defconfig files: 110:zephyr_file:`boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m7_defconfig` and 111:zephyr_file:`boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m4_defconfig` 112 113For mode details please refer to `STM32 Nucleo-144 board User Manual`_. 114 115Default Zephyr Peripheral Mapping: 116---------------------------------- 117 118The Nucleo H755ZI board features a ST Zio connector (extended Arduino Uno V3) 119and a ST morpho connector. Board is configured as follows: 120 121- USART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com) 122- USER_PB : PC13 123- LD1 : PA5 124- LD2 : PE1 125- LD3 : PB14 126- I2C : PB8, PB9 127 128System Clock 129------------ 130 131Nucleo H755ZI-Q System Clock can be driven by an internal or external 132oscillator, as well as the main PLL clock. By default, the System clock is 133driven by the PLL clock at 480MHz, driven by an 8MHz high-speed external clock. 134 135Serial Port 136----------- 137 138Nucleo H755ZI-Q board has 4 UARTs and 4 USARTs. The Zephyr console output is 139assigned to USART3. Default settings are 115200 8N1. 140 141Resources sharing 142----------------- 143 144The dual core nature of STM32H755 SoC requires sharing HW resources between the 145two cores. This is done in 3 ways: 146 147- **Compilation**: Clock configuration is only accessible to M7 core. M4 core only 148 has access to bus clock activation and deactivation. 149- **Static pre-compilation assignment**: Peripherals such as a UART are assigned in 150 devicetree before compilation. The user must ensure peripherals are not assigned 151 to both cores at the same time. 152- **Run time protection**: Interrupt-controller and GPIO configurations could be 153 accessed by both cores at run time. Accesses are protected by a hardware semaphore 154 to avoid potential concurrent access issues. 155 156Programming and Debugging 157************************* 158 159Nucleo H755ZI-Q board includes an ST-LINK/V3 embedded debug tool interface. 160 161Applications for the ``nucleo_h755zi_q`` board should be built per core target, 162using either ``nucleo_h755zi_q/stm32h755xx/m7`` or ``nucleo_h755zi_q/stm32h755xx/m4`` 163as the target (see :ref:`build_an_application` and :ref:`application_run` for more 164details). 165 166.. note:: 167 168 Check if the board's ST-LINK/V3 has the newest firmware version. It can be 169 updated with `STM32CubeProgrammer`_ 170 171Flashing 172======== 173 174The board is configured to be flashed using west `STM32CubeProgrammer`_ runner 175for both cores, so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required. 176The target core is detected automatically. 177 178It is advised to use `STM32CubeProgrammer`_ to check and update option bytes 179configuration and flash ``nucleo_h755zi_q/stm32h755xx/m7`` and 180``nucleo_h755zi_q/stm32h755xx/m4`` board targets. 181 182By default: 183 184 - CPU0 (Cortex-M7) boot address is set to 0x08000000 (OB: BOOT_CM7_ADD0) 185 - CPU1 (Cortex-M4) boot address is set to 0x08100000 (OB: BOOT_CM4_ADD0) 186 187Also, default out of the box board configuration enables CM7 and CM4 boot when 188board is powered (Option bytes BCM7 and BCM4 are checked). 189In that configuration, Kconfig boot option ``STM32H7_BOOT_CM4_CM7`` should be selected. 190Zephyr flash configuration has been set to meet these default settings. 191 192Alternatively, OpenOCD or JLink can also be used to flash the board using 193the ``--runner`` (or ``-r``) option: 194 195.. code-block:: console 196 197 $ west flash --runner openocd 198 $ west flash --runner jlink 199 200Flashing an application to STM32H755ZI M7 Core 201---------------------------------------------- 202First, connect the NUCLEO-H755ZI-Q to your host computer using 203the USB port to prepare it for flashing. Then build and flash your application. 204 205Here is an example for the :zephyr:code-sample:`hello_world` application. 206 207Run a serial host program to connect with your NUCLEO-H755ZI-Q board. 208 209.. code-block:: console 210 211 $ minicom -b 115200 -D /dev/ttyACM0 212 213or use screen: 214 215.. code-block:: console 216 217 $ screen /dev/ttyACM0 115200 218 219Build and flash the application: 220 221.. zephyr-app-commands:: 222 :zephyr-app: samples/hello_world 223 :board: nucleo_h755zi_q/stm32h755xx/m7 224 :goals: build flash 225 226You should see the following message on the console: 227 228.. code-block:: console 229 230 $ Hello World! nucleo_h755zi_q/stm32h755xx/m7 231 232.. note:: 233 Sometimes, flashing via OpenOCD does not work. It is necessary to erase the flash 234 (with STM32CubeProgrammer for example) to make it work again. 235 236Similarly, you can build and flash samples on the M4 target. For this, please 237take care of the resource sharing (UART port used for console for instance). 238 239Here is an example for the :zephyr:code-sample:`blinky` application on M4 core. 240 241.. zephyr-app-commands:: 242 :zephyr-app: samples/basic/blinky 243 :board: nucleo_h755zi_q/stm32h755xx/m4 244 :goals: build flash 245 246.. note:: 247 248 Flashing both M4 and M7 and pushing RESTART button on the board leads 249 to LD1 and LD2 flashing simultaneously. 250 251Debugging 252========= 253 254You can debug an application on the Cortex M7 core in the usual way. 255Here is an example for the :zephyr:code-sample:`hello_world` application. 256 257.. zephyr-app-commands:: 258 :zephyr-app: samples/hello_world 259 :board: nucleo_h755zi_q/stm32h755xx/m7 260 :maybe-skip-config: 261 :goals: debug 262 263Debugging a Zephyr application on Cortex M4 side with west is currently not 264available. As a workaround, `STM32CubeIDE`_ can be used. 265 266.. _Nucleo H755ZI-Q website: 267 https://www.st.com/en/evaluation-tools/nucleo-h755zi-q.html 268 269.. _STM32 Nucleo-144 board User Manual: 270 https://www.st.com/resource/en/user_manual/dm00499171-stm32h7-nucleo144-boards-mb1363-stmicroelectronics.pdf 271 272.. _STM32H755ZI on www.st.com: 273 https://www.st.com/en/microcontrollers-microprocessors/stm32h755zi.html 274 275.. _STM32H755 reference manual: 276 https://www.st.com/resource/en/reference_manual/dm00176879-stm32h745755-and-stm32h747757-advanced-armbased-32bit-mcus-stmicroelectronics.pdf 277 278.. _OpenOCD installing Debug Version: 279 https://github.com/zephyrproject-rtos/openocd 280 281.. _OpenOCD installing with ST-LINK V3 support: 282 https://mbd.kleier.net/integrating-st-link-v3.html 283 284.. _STM32CubeIDE: 285 https://www.st.com/en/development-tools/stm32cubeide.html 286 287.. _STM32CubeProgrammer: 288 https://www.st.com/en/development-tools/stm32cubeprog.html 289
