Searched refs:cores (Results 126 – 150 of 158) sorted by relevance
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| /Zephyr-latest/boards/nxp/mimxrt595_evk/doc/ |
| D | index.rst | 322 …rs/i-mx-rt-crossover-mcus/i-mx-rt500-crossover-mcu-with-arm-cortex-m33-dsp-and-gpu-cores:i.MX-RT500
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| /Zephyr-latest/boards/nxp/mimxrt685_evk/doc/ |
| D | index.rst | 359 …ollers/i-mx-rt-crossover-mcus/i-mx-rt600-crossover-mcu-with-arm-cortex-m33-and-dsp-cores:i.MX-RT600
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| /Zephyr-latest/boards/nxp/frdm_mcxn947/doc/ |
| D | index.rst | 254 For an example of building for both cores with System Build, see
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| /Zephyr-latest/doc/hardware/porting/ |
| D | soc_porting.rst | 21 - CPU Cluster: a cluster of one or more CPU cores.
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| D | board_porting.rst | 165 CPU core. The number of cores in a CPU cluster cannot be determined from the
462 for Arm v7-M cores.
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| /Zephyr-latest/subsys/bluetooth/ |
| D | Kconfig | 129 controller are on separate cores since it ensures that we do
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| /Zephyr-latest/boards/nxp/mimxrt1160_evk/doc/ |
| D | index.rst | 375 …rt1160-crossover-mcu-family-high-performance-mcu-with-arm-cortex-m7-and-cortex-m4-cores:i.MX-RT1160
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| /Zephyr-latest/boards/nxp/lpcxpresso55s69/doc/ |
| D | index.rst | 356 an example of building for both cores with sysbuild, see
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| /Zephyr-latest/boards/snps/em_starterkit/doc/ |
| D | index.rst | 9 EM5D, EM7D, EM9D, and EM11D cores. The Zephyr RTOS can be used with the
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| /Zephyr-latest/boards/udoo/udoo_neo_full/doc/ |
| D | index.rst | 328 …sors/i.mx-6solox-processors-heterogeneous-processing-with-arm-cortex-a9-and-cortex-m4-cores:i.MX6SX
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| /Zephyr-latest/boards/phytec/phyboard_polis/doc/ |
| D | index.rst | 357 More simple interfaces can be enabled on both cores at the same time, for
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| /Zephyr-latest/boards/nxp/mimxrt1170_evk/doc/ |
| D | index.rst | 474 …s/i-mx-rt1170-crossover-mcu-family-first-ghz-mcu-with-arm-cortex-m7-and-cortex-m4-cores:i.MX-RT1170
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| /Zephyr-latest/tests/benchmarks/latency_measure/ |
| D | README.rst | 54 | prj.objcore.conf | Enable object cores and statistics |
223 enabling of the object cores as was done here results in the additional
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| /Zephyr-latest/doc/services/ipc/ipc_service/backends/ |
| D | ipc_service_icbmsg.rst | 43 * If at least one of the cores uses data cache on shared memory, set the ``dcache-alignment`` value.
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| /Zephyr-latest/doc/develop/ |
| D | beyond-GSG.rst | 358 running different Zephyr-based binaries on CPU cores of differing
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| /Zephyr-latest/doc/develop/west/ |
| D | build-flash-debug.rst | 339 By default, ``ninja`` uses all of your cores to build, while ``make`` uses only
343 For example, to build with 4 cores::
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| /Zephyr-latest/subsys/debug/ |
| D | Kconfig | 89 cores separately. This feature is needed for platforms running
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| /Zephyr-latest/doc/services/logging/ |
| D | index.rst | 561 For example, let's consider an SoC with two ARM Cortex-M33 cores with TrustZone: cores A and B (see
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| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_rt11xx.dtsi | 227 * Note that CM7 and CM4 cores do not have the same memory addresses
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-3.5.rst | 88 * Introduced support for ARCv3 HS (both 32 and 64 bit) SMP platforms with up to 12 CPU cores
313 * Added support for nsim_hs5x_smp_12cores - simulation (nSIM) platform with 12 cores SMP 32-bit
315 * Added support for nsim_hs6x_smp_12cores - simulation (nSIM) platform with 12 cores SMP 64-bit
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| D | release-notes-3.1.rst | 337 * Fixed SMP boot code to take into account multiple cores booting at the same time
1479 * :github:`44872` - k_timer callback timing incorrect with multiple lightly loaded cores
1490 * :github:`44797` - x86: Interrupt handling not working for cores <> core0 - VMs not having core 0 …
1617 * :github:`43964` - k_timer callback timing gets unreliable with more cores active
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| D | release-notes-3.6.rst | 77 Cortex-R to enable initialization by individual cores.
211 and support OpenAMP to communicate between the cores.
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| D | release-notes-1.11.rst | 47 * Armv8-M initial architecture support, including the following cores:
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| D | release-notes-2.5.rst | 1781 * :github:`26794` - arc: smp: different sanitycheck results of ARC hsdk's 2 cores and 4 cores confi…
1840 * :github:`24652` - sanitycheck doesn't keep my cores busy
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| D | release-notes-1.14.rst | 454 specific cores or sets of cores. The core kernel no longer uses the
545 specific cores or sets of cores.
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