1.. zephyr:board:: mimxrt595_evk
2
3Overview
4********
5
6i.MX RT500 crossover MCUs are part of the edge computing family and are optimized
7for low-power HMI applications by combining a graphics engine and a streamlined
8Cadence Tensilica Fusion F1 DSP core with a next-generation Arm Cortex-M33
9core. These devices are designed to unlock the potential of display-based applications
10with a secure, power-optimized embedded processor.
11
12i.MX RT500 MCUs provides up to 5MB of on-chip SRAM and several high-bandwidth interfaces
13to access off-chip flash, including an Octal/Quad SPI interface with an on-the-fly
14decryption engine.
15
16
17Hardware
18********
19
20- MIMXRT595SFFOC Cortex-M33 (275 MHz) core processor with Cadence Tensilica Fusion F1 DSP
21- Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP protocol (supporting Cortex M33 debug only)
22- USB2.0 high-speed host and device with micro USB connector and external crystal
23- Octal/Quad/pSRAM external memories via FlexSPI
24- 5 MB system SRAM
25- Full size SD card slot (SDIO)
26- On-board eMMC chip
27- On-board 5 V inputs NXP PCA9420UK PMIC providing 1.2 V, 1.8 V, 3.3 V
28- User LEDs
29- Reset and User buttons
30- MIPI-DSI connector
31- Single row headers for ARDUINO signals and MikroBus connector
32- FlexIO connector for MikroElektronica TFT Proto 5 inch capacitive touch display
33- One motion sensor combo accelero-/magneto-meter NXP FXOS8700CQ
34- Stereo audio codec with line-In/ line-Out/ and Microphone
35- Pmod/host expansion connector
36- NXP TFA9896 audio digital amplifier
37- Support for up to eight off-board digital microphones via 12-pin header
38- Two on-board digital microphones
39
40For more information about the MIMXRT595 SoC and MIMXRT595-EVK board, see
41these references:
42
43- `i.MX RT595 Website`_
44- `i.MX RT595 Datasheet`_
45- `i.MX RT595 Reference Manual`_
46- `MIMXRT595-EVK Website`_
47- `MIMXRT595-EVK User Guide`_
48- `MIMXRT595-EVK Schematics`_
49- `MIMXRT595-EVK Debug Firmware`_
50
51Supported Features
52==================
53
54NXP considers the MIMXRT595-EVK as a superset board for the i.MX RT5xx
55family of MCUs.  This board is a focus for NXP's Full Platform Support for
56Zephyr, to better enable the entire RT5xx family.  NXP prioritizes enabling
57this board with new support for Zephyr features.  The mimxrt595_evk board
58configuration supports the hardware features below.  Another very similar
59board is the :zephyr:board:`mimxrt685_evk`, and that board may have additional features
60already supported, which can also be re-used on this mimxrt595_evk board:
61
62+-----------+------------+-------------------------------------+
63| Interface | Controller | Driver/Component                    |
64+===========+============+=====================================+
65| NVIC      | on-chip    | nested vector interrupt controller  |
66+-----------+------------+-------------------------------------+
67| SYSTICK   | on-chip    | systick                             |
68+-----------+------------+-------------------------------------+
69| OS_TIMER  | on-chip    | os timer                            |
70+-----------+------------+-------------------------------------+
71| IOCON     | on-chip    | pinmux                              |
72+-----------+------------+-------------------------------------+
73| GPIO      | on-chip    | gpio                                |
74+-----------+------------+-------------------------------------+
75| USART     | on-chip    | serial port-polling;                |
76|           |            | serial port-interrupt               |
77+-----------+------------+-------------------------------------+
78| CLOCK     | on-chip    | clock_control                       |
79+-----------+------------+-------------------------------------+
80| I2C       | on-chip    | i2c                                 |
81+-----------+------------+-------------------------------------+
82| SPI       | on-chip    | spi                                 |
83+-----------+------------+-------------------------------------+
84| CTIMER    | on-chip    | counter                             |
85+-----------+------------+-------------------------------------+
86| WDT       | on-chip    | watchdog                            |
87+-----------+------------+-------------------------------------+
88| FLASH     | on-chip    | OctalSPI Flash                      |
89+-----------+------------+-------------------------------------+
90| TRNG      | on-chip    | entropy                             |
91+-----------+------------+-------------------------------------+
92| USB       | on-chip    | USB device                          |
93+-----------+------------+-------------------------------------+
94| FLEXSPI   | on-chip    | flash programming                   |
95+-----------+------------+-------------------------------------+
96| RTC       | on-chip    | counter                             |
97+-----------+------------+-------------------------------------+
98| PM        | on-chip    | power management; uses SoC sleep,   |
99|           |            | deep sleep and deep-powerdown modes |
100+-----------+------------+-------------------------------------+
101| SDHC      | on-chip    | disk access (works with eMMC & SD)  |
102+-----------+------------+-------------------------------------+
103| I2S       | on-chip    | i2s                                 |
104+-----------+------------+-------------------------------------+
105| DISPLAY   | on-chip    | LCDIF; MIPI-DSI. Tested with        |
106|           |            | :ref:`rk055hdmipi4m`,               |
107|           |            | :ref:`rk055hdmipi4ma0`, and         |
108|           |            | :ref:`g1120b0mipi` display shields  |
109+-----------+------------+-------------------------------------+
110| DMIC      | on-chip    | dmic                                |
111+-----------+------------+-------------------------------------+
112
113The default configuration can be found in the defconfig file:
114
115   :zephyr_file:`boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33_defconfig`
116
117Other hardware features are not currently supported by the port.
118
119Connections and IOs
120===================
121
122The MIMXRT595 SoC has IOCON registers, which can be used to configure the
123functionality of a pin.
124
125+---------+-----------------+----------------------------+
126| Name    | Function        | Usage                      |
127+=========+=================+============================+
128| PIO0_2  | USART0          | USART RX                   |
129+---------+-----------------+----------------------------+
130| PIO0_1  | USART0          | USART TX                   |
131+---------+-----------------+----------------------------+
132| PIO0_14 | GPIO            | GREEN LED                  |
133+---------+-----------------+----------------------------+
134| PIO0_25 | GPIO            | SW0                        |
135+---------+-----------------+----------------------------+
136| PIO0_10 | GPIO            | SW1                        |
137+---------+-----------------+----------------------------+
138| PIO4_30 | USART12         | USART TX                   |
139+---------+-----------------+----------------------------+
140| PIO4_31 | USART12         | USART RX                   |
141+---------+-----------------+----------------------------+
142| PIO0_29 | I2C             | I2C SCL                    |
143+---------+-----------------+----------------------------+
144| PIO0_30 | I2C             | I2C SDA                    |
145+---------+-----------------+----------------------------+
146| PIO0_22 | GPIO            | FXOS8700 TRIGGER           |
147+---------+-----------------+----------------------------+
148| PIO1_5  | SPI             | SPI MOSI                   |
149+---------+-----------------+----------------------------+
150| PIO1_4  | SPI             | SPI MISO                   |
151+---------+-----------------+----------------------------+
152| PIO1_3  | SPI             | SPI SCK                    |
153+---------+-----------------+----------------------------+
154| PIO1_6  | SPI             | SPI SSEL                   |
155+---------+-----------------+----------------------------+
156| PIO0_5  | SCT0            | SCT0 GPI0                  |
157+---------+-----------------+----------------------------+
158| PIO0_6  | SCT0            | SCT0 GPI1                  |
159+---------+-----------------+----------------------------+
160
161System Clock
162============
163
164The MIMXRT595 EVK is configured to use the OS Event timer
165as a source for the system clock.
166
167Serial Port
168===========
169
170The MIMXRT595 SoC has 13 FLEXCOMM interfaces for serial communication. One is
171configured as USART for the console and the remaining are not used.
172
173Fusion F1 DSP Core
174==================
175
176You can build a Zephyr application for the RT500 DSP core by targeting the F1
177SOC. Xtensa toolchain supporting RT500 DSP core is included in Zephyr SDK.
178To build the hello_world sample for the RT500 DSP core:
179
180.. code-block:: shell
181
182   $ west build -b mimxrt595_evk/mimxrt595s/f1 samples/hello_world
183
184For detailed instructions on how to debug DSP firmware, please refer to
185this document: `Getting Started with Xplorer for EVK-MIMXRT595`_
186
187Programming and Debugging
188*************************
189
190Build and flash applications as usual (see :ref:`build_an_application` and
191:ref:`application_run` for more details).
192
193Configuring a Debug Probe
194=========================
195
196A debug probe is used for both flashing and debugging the board. This board is
197configured by default to use the LPC-Link2.
198
199.. tabs::
200
201    .. group-tab:: LPCLink2 JLink Onboard
202
203
204        1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path.
205        2. To connect the SWD signals to onboard debug circuit, install jumpers JP17, JP18 and JP19,
206           if not already done (these jumpers are installed by default).
207        3. Follow the instructions in :ref:`lpclink2-jlink-onboard-debug-probe` to program the
208           J-Link firmware. Please make sure you have the latest firmware for this board.
209
210    .. group-tab:: JLink External
211
212
213        1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path.
214
215        2. To disconnect the SWD signals from onboard debug circuit, **remove** jumpers J17, J18,
216           and J19 (these are installed by default).
217
218        3. Connect the J-Link probe to J2 10-pin header.
219
220        See :ref:`jlink-external-debug-probe` for more information.
221
222    .. group-tab:: Linkserver
223
224        1. Install the :ref:`linkserver-debug-host-tools` and make sure they are in your search path.
225        2. To update the debug firmware, please follow the instructions on `MIMXRT595-EVK Debug Firmware`
226
227Configuring a Console
228=====================
229
230Connect a USB cable from your PC to J40, and use the serial terminal of your choice
231(minicom, putty, etc.) with the following settings:
232
233- Speed: 115200
234- Data: 8 bits
235- Parity: None
236- Stop bits: 1
237
238Flashing
239========
240
241Here is an example for the :zephyr:code-sample:`hello_world` application. This example uses the
242:ref:`jlink-debug-host-tools` as default.
243
244.. zephyr-app-commands::
245   :zephyr-app: samples/hello_world
246   :board: mimxrt595_evk/mimxrt595s/cm33
247   :goals: flash
248
249Open a serial terminal, reset the board (press the RESET button), and you should
250see the following message in the terminal:
251
252.. code-block:: console
253
254   *** Booting Zephyr OS v2.7 ***
255   Hello World! mimxrt595_evk
256
257Debugging
258=========
259
260Here is an example for the :zephyr:code-sample:`hello_world` application. This example uses the
261:ref:`jlink-debug-host-tools` as default.
262
263.. zephyr-app-commands::
264   :zephyr-app: samples/hello_world
265   :board: mimxrt595_evk/mimxrt595s/cm33
266   :goals: debug
267
268Open a serial terminal, step through the application in your debugger, and you
269should see the following message in the terminal:
270
271.. code-block:: console
272
273   *** Booting Zephyr OS v2.7 ***
274   Hello World! mimxrt595_evk
275
276Troubleshooting
277===============
278
279If the debug probe fails to connect with the following error, it's possible
280that the image in flash is interfering and causing this issue.
281
282.. code-block:: console
283
284   Remote debugging using :2331
285   Remote communication error.  Target disconnected.: Connection reset by peer.
286   "monitor" command not supported by this target.
287   "monitor" command not supported by this target.
288   You can't do that when your target is `exec'
289   (gdb) Could not connect to target.
290   Please check power, connection and settings.
291
292You can fix it by erasing and reprogramming the flash with the following
293steps:
294
295#. Set the SW7 DIP switches to ON-ON-ON to prevent booting from flash.
296
297#. Reset by pressing SW3
298
299#. Run ``west debug`` or ``west flash`` again with a known working Zephyr
300   application (example "Hello World").
301
302#. Set the SW5 DIP switches to OFF-OFF-ON to boot from flash.
303
304#. Reset by pressing SW3
305
306.. _MIMXRT595-EVK Website:
307   https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt595-evaluation-kit:MIMXRT595-EVK
308
309.. _MIMXRT595-EVK User Guide:
310   https://www.nxp.com/webapp/Download?colCode=MIMXRT595EVKHUG
311
312.. _MIMXRT595-EVK Debug Firmware:
313   https://www.nxp.com/docs/en/application-note/AN13206.pdf
314
315.. _MIMXRT595-EVK Schematics:
316   https://www.nxp.com/downloads/en/schematics/MIMXRT595-EVK-DESIGN-FILES.zip
317
318.. _i.MX RT595 Website:
319   https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-mcus/i-mx-rt500-crossover-mcu-with-arm-cortex-m33-dsp-and-gpu-cores:i.MX-RT500
320
321.. _i.MX RT595 Datasheet:
322   https://www.nxp.com/docs/en/data-sheet/IMXRT500EC.pdf
323
324.. _i.MX RT595 Reference Manual:
325   https://www.nxp.com/webapp/Download?colCode=IMXRT500RM
326
327.. _Getting Started with Xplorer for EVK-MIMXRT595:
328   https://www.nxp.com/docs/en/supporting-information/GSXEVKMIMXRT595.pdf
329