1.. zephyr:board:: mimxrt1170_evk 2 3Overview 4******** 5 6The dual core i.MX RT1170 runs on the Cortex-M7 core at 1 GHz and on the Cortex-M4 7at 400 MHz. The i.MX RT1170 MCU offers support over a wide temperature range 8and is qualified for consumer, industrial and automotive markets. Zephyr 9supports the initial revision of this EVK, as well as rev EVKB. 10 11Hardware 12******** 13 14- MIMXRT1176DVMAA MCU 15 16 - 1GHz Cortex-M7 & 400Mhz Cortex-M4 17 - 2MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4 18 19- Memory 20 21 - 512 Mbit SDRAM 22 - 128 Mbit QSPI Flash 23 - 512 Mbit Octal Flash 24 - 2 Gbit raw NAND flash 25 - 64 Mbit LPSPI flash 26 - TF socket for SD card 27 28- Display 29 30 - MIPI LCD connector 31 32- Ethernet 33 34 - 10/100 Mbit/s Ethernet PHY 35 - 10/100/1000 Mbit/s Ethernet PHY 36 37- USB 38 39 - USB 2.0 OTG connector 40 - USB 2.0 host connector 41 42- Audio 43 44 - 3.5 mm audio stereo headphone jack 45 - Board-mounted microphone 46 - Left and right speaker out connectors 47 48- Power 49 50 - 5 V DC jack 51 52- Debug 53 54 - JTAG 20-pin connector 55 - on-board debugger 56 57- Sensor 58 59 - FXOS8700CQ 6-axis e-compass 60 - MIPI camera sensor connector 61 62- Expansion port 63 64 - Arduino interface 65 - M.2 WIFI/BT interface 66 67- CAN bus connector 68 69For more information about the MIMXRT1170 SoC and MIMXRT1170-EVK board, see 70these references: 71 72- `i.MX RT1170 Website`_ 73- `i.MX RT1170 Datasheet`_ 74- `i.MX RT1170 Reference Manual`_ 75- `MIMXRT1170-EVK Website`_ 76- `MIMXRT1170-EVK Board Hardware User's Guide`_ 77 78External Memory 79=============== 80 81This platform has the following external memories: 82 83+--------------------+------------+-------------------------------------+ 84| Device | Controller | Status | 85+====================+============+=====================================+ 86| W9825G6KH | SEMC | Enabled via device configuration | 87| SDRAM | | data (DCD) block, which sets up | 88| | | the SEMC at boot time | 89+--------------------+------------+-------------------------------------+ 90| IS25WP128 | FLEXSPI | Enabled via flash configuration | 91| QSPI flash | | block (FCB), which sets up the | 92| (RT1170 EVK) | | FLEXSPI at boot time. | 93+--------------------+------------+-------------------------------------+ 94| W25Q512NWEIQ | FLEXSPI | Enabled via flash configuration | 95| QSPI flash | | block (FCB), which sets up the | 96| (RT1170 EVKB) | | FLEXSPI at boot time. Supported for | 97| | | XIP only. | 98+--------------------+------------+-------------------------------------+ 99 100Supported Features 101================== 102 103NXP considers the MIMXRT1170-EVK as the superset board for the i.MX RT11xx 104family of MCUs. This board is a focus for NXP's Full Platform Support for 105Zephyr, to better enable the entire RT11xx family. NXP prioritizes enabling 106this board with new support for Zephyr features. Note that this table 107covers two boards: the RT1170 EVK (``mimxrt1170_evk//cm7/cm4``), and 108RT1170 EVKB (``mimxrt1170_evk@B//cm7/cm4``) 109 110+-----------+------------+------------------------------------------------+-----------------+-----------------+ 111| Interface | Controller | Driver/Component | RT1170 EVK | RT1170 EVKB | 112+===========+============+================================================+=================+=================+ 113| NVIC | on-chip | nested vector interrupt controller | Supported | Supported | 114+-----------+------------+------------------------------------------------+-----------------+-----------------+ 115| SYSTICK | on-chip | systick | Supported | Supported | 116+-----------+------------+------------------------------------------------+-----------------+-----------------+ 117| GPIO | on-chip | gpio | Supported | Supported | 118+-----------+------------+------------------------------------------------+-----------------+-----------------+ 119| COUNTER | on-chip | gpt | Supported | Supported | 120+-----------+------------+------------------------------------------------+-----------------+-----------------+ 121| TIMER | on-chip | gpt | Supported | Supported | 122+-----------+------------+------------------------------------------------+-----------------+-----------------+ 123| CAN | on-chip | flexcan | Supported (M7) | Supported (M7) | 124+-----------+------------+------------------------------------------------+-----------------+-----------------+ 125| SPI | on-chip | spi | Supported (M7) | Supported | 126+-----------+------------+------------------------------------------------+-----------------+-----------------+ 127| I2C | on-chip | i2c | Supported | Supported | 128+-----------+------------+------------------------------------------------+-----------------+-----------------+ 129| PWM | on-chip | pwm | Supported | Supported | 130+-----------+------------+------------------------------------------------+-----------------+-----------------+ 131| ADC | on-chip | adc | Supported (M7) | Supported (M7) | 132+-----------+------------+------------------------------------------------+-----------------+-----------------+ 133| UART | on-chip | serial port-polling; | Supported | Supported | 134| | | serial port-interrupt; | | | 135| | | serial port-async | | | 136+-----------+------------+------------------------------------------------+-----------------+-----------------+ 137| DMA | on-chip | dma | Supported | Supported | 138+-----------+------------+------------------------------------------------+-----------------+-----------------+ 139| WATCHDOG | on-chip | watchdog | Supported (M7) | Supported (M7) | 140+-----------+------------+------------------------------------------------+-----------------+-----------------+ 141| ENET | on-chip | ethernet - 10/100M | Supported (M7) | Supported (M7) | 142+-----------+------------+------------------------------------------------+-----------------+-----------------+ 143| ENET1G | on-chip | ethernet - 10/100/1000M | Supported (M7) | Supported (M7) | 144+-----------+------------+------------------------------------------------+-----------------+-----------------+ 145| SAI | on-chip | i2s | Supported (M7) | Supported (M7) | 146+-----------+------------+------------------------------------------------+-----------------+-----------------+ 147| USB | on-chip | USB Device | Supported (M7) | Supported (M7) | 148+-----------+------------+------------------------------------------------+-----------------+-----------------+ 149| HWINFO | on-chip | Unique device serial number | Supported (M7) | Supported (M7) | 150+-----------+------------+------------------------------------------------+-----------------+-----------------+ 151| DISPLAY | on-chip | eLCDIF; MIPI-DSI. Tested with | Supported (M7) | Supported (M7) | 152| | | :ref:`rk055hdmipi4m`, | | | 153| | | :ref:`rk055hdmipi4ma0`, | | | 154| | | and :ref:`g1120b0mipi` shields | | | 155+-----------+------------+------------------------------------------------+-----------------+-----------------+ 156| ACMP | on-chip | sensor | Supported | Supported | 157+-----------+------------+------------------------------------------------+-----------------+-----------------+ 158| CAAM RNG | on-chip | entropy | Supported (M7) | Supported (M7) | 159+-----------+------------+------------------------------------------------+-----------------+-----------------+ 160| FLEXSPI | on-chip | flash programming | Supported (M7) | Supported (M7) | 161+-----------+------------+------------------------------------------------+-----------------+-----------------+ 162| SDHC | on-chip | SD host controller | Supported (M7) | Supported (M7) | 163+-----------+------------+------------------------------------------------+-----------------+-----------------+ 164| PIT | on-chip | pit | Supported (M7) | Supported (M7) | 165+-----------+------------+------------------------------------------------+-----------------+-----------------+ 166| VIDEO | on-chip | CSI; MIPI CSI-2 Rx. Tested with | Supported (M7) | Supported (M7) | 167| | | :ref:`nxp_btb44_ov5640` shield | | | 168+-----------+------------+------------------------------------------------+-----------------+-----------------+ 169| UART | NXP IW61x | M.2 WIFI/BT module | Unsupported | Supported (M7) | 170| | | (select :kconfig:option:`CONFIG_BT_NXP_NW612`) | | | 171+-----------+------------+------------------------------------------------+-----------------+-----------------+ 172 173The default configuration can be found in the defconfig files: 174:zephyr_file:`boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_defconfig` 175:zephyr_file:`boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4_defconfig` 176 177Connections and I/Os 178==================== 179 180The MIMXRT1170 SoC has six pairs of pinmux/gpio controllers. 181 182+---------------------------+----------------+------------------+ 183| Name | Function | Usage | 184+---------------------------+----------------+------------------+ 185| WAKEUP | GPIO | SW7 | 186+---------------------------+----------------+------------------+ 187| GPIO_AD_04 | GPIO | LED | 188+---------------------------+----------------+------------------+ 189| GPIO_AD_24 | LPUART1_TX | UART Console | 190+---------------------------+----------------+------------------+ 191| GPIO_AD_25 | LPUART1_RX | UART Console | 192+---------------------------+----------------+------------------+ 193| GPIO_LPSR_00 | CAN3_TX | flexcan | 194+---------------------------+----------------+------------------+ 195| GPIO_LPSR_01 | CAN3_RX | flexcan | 196+---------------------------+----------------+------------------+ 197| GPIO_AD_29 | SPI1_CS0 | spi | 198+---------------------------+----------------+------------------+ 199| GPIO_AD_28 | SPI1_CLK | spi | 200+---------------------------+----------------+------------------+ 201| GPIO_AD_30 | SPI1_SDO | spi | 202+---------------------------+----------------+------------------+ 203| GPIO_AD_31 | SPI1_SDI | spi | 204+---------------------------+----------------+------------------+ 205| GPIO_AD_08 | LPI2C1_SCL | i2c | 206+---------------------------+----------------+------------------+ 207| GPIO_AD_09 | LPI2C1_SDA | i2c | 208+---------------------------+----------------+------------------+ 209| GPIO_LPSR_05 | LPI2C5_SCL | i2c | 210+---------------------------+----------------+------------------+ 211| GPIO_LPSR_04 | LPI2C5_SDA | i2c | 212+---------------------------+----------------+------------------+ 213| GPIO_AD_04 | FLEXPWM1_PWM2 | pwm | 214+---------------------------+----------------+------------------+ 215| GPIO_AD_32 | ENET_MDC | Ethernet | 216+---------------------------+----------------+------------------+ 217| GPIO_AD_33 | ENET_MDIO | Ethernet | 218+---------------------------+----------------+------------------+ 219| GPIO_DISP_B2_02 | ENET_TX_DATA00 | Ethernet | 220+---------------------------+----------------+------------------+ 221| GPIO_DISP_B2_03 | ENET_TX_DATA01 | Ethernet | 222+---------------------------+----------------+------------------+ 223| GPIO_DISP_B2_04 | ENET_TX_EN | Ethernet | 224+---------------------------+----------------+------------------+ 225| GPIO_DISP_B2_05 | ENET_REF_CLK | Ethernet | 226+---------------------------+----------------+------------------+ 227| GPIO_DISP_B2_06 | ENET_RX_DATA00 | Ethernet | 228+---------------------------+----------------+------------------+ 229| GPIO_DISP_B2_07 | ENET_RX_DATA01 | Ethernet | 230+---------------------------+----------------+------------------+ 231| GPIO_DISP_B2_08 | ENET_RX_EN | Ethernet | 232+---------------------------+----------------+------------------+ 233| GPIO_DISP_B2_09 | ENET_RX_ER | Ethernet | 234+---------------------------+----------------+------------------+ 235| GPIO_AD_17_SAI1_MCLK | SAI_MCLK | SAI | 236+---------------------------+----------------+------------------+ 237| GPIO_AD_21_SAI1_TX_DATA00 | SAI1_TX_DATA | SAI | 238+---------------------------+----------------+------------------+ 239| GPIO_AD_22_SAI1_TX_BCLK | SAI1_TX_BCLK | SAI | 240+---------------------------+----------------+------------------+ 241| GPIO_AD_23_SAI1_TX_SYNC | SAI1_TX_SYNC | SAI | 242+---------------------------+----------------+------------------+ 243| GPIO_AD_17_SAI1_MCLK | SAI1_MCLK | SAI | 244+---------------------------+----------------+------------------+ 245| GPIO_AD_20_SAI1_RX_DATA00 | SAI1_RX_DATA00 | SAI | 246+---------------------------+----------------+------------------+ 247| GPIO_DISP_B2_10 | LPUART2_TX | M.2 BT HCI | 248+---------------------------+----------------+------------------+ 249| GPIO_DISP_B2_11 | LPUART2_RX | M.2 BT HCI | 250+---------------------------+----------------+------------------+ 251| GPIO_DISP_B2_12 | LPUART2_CTS_B | M.2 BT HCI | 252+---------------------------+----------------+------------------+ 253| GPIO_DISP_B2_13 | LPUART1_RTS_B | M.2 BT HCI | 254+---------------------------+----------------+------------------+ 255 256Dual Core samples 257***************** 258 259+-----------+------------------+----------------------------+ 260| Core | Boot Address | Comment | 261+===========+==================+============================+ 262| Cortex M7 | 0x30000000[630K] | primary core | 263+-----------+------------------+----------------------------+ 264| Cortex M4 | 0x20020000[96k] | boots from OCRAM | 265+-----------+------------------+----------------------------+ 266 267+----------+------------------+-----------------------+ 268| Memory | Address[Size] | Comment | 269+==========+==================+=======================+ 270| flexspi1 | 0x30000000[16M] | Cortex M7 flash | 271+----------+------------------+-----------------------+ 272| sdram0 | 0x80030000[64M] | Cortex M7 ram | 273+----------+------------------+-----------------------+ 274| ocram | 0x20020000[512K] | Cortex M4 "flash" | 275+----------+------------------+-----------------------+ 276| sram1 | 0x20000000[128K] | Cortex M4 ram | 277+----------+------------------+-----------------------+ 278| ocram2 | 0x200C0000[512K] | Mailbox/shared memory | 279+----------+------------------+-----------------------+ 280 281Only the first 16K of ocram2 has the correct MPU region attributes set to be 282used as shared memory 283 284System Clock 285============ 286 287The MIMXRT1170 SoC is configured to use SysTick as the system clock source, 288running at 996MHz. When targeting the M4 core, SysTick will also be used, 289running at 400MHz 290 291When power management is enabled, the 32 KHz low frequency 292oscillator on the board will be used as a source for the GPT timer to 293generate a system clock. This clock enables lower power states, at the 294cost of reduced resolution 295 296Serial Port 297=========== 298 299The MIMXRT1170 SoC has 12 UARTs. ``LPUART1`` is configured for the console, 300``LPUART2`` for the Bluetooth Host Controller Interface (BT HCI), and the 301remaining are not used. 302 303Fetch Binary Blobs 304================== 305 306The board Bluetooth/WiFi module requires fetching some binary blob files, to do 307that run the command: 308 309.. code-block:: console 310 311 west blobs fetch hal_nxp 312 313.. note:: Only Bluetooth functionality is currently supported. 314 315Programming and Debugging 316************************* 317 318Build and flash applications as usual (see :ref:`build_an_application` and 319:ref:`application_run` for more details). 320 321Building a Dual-Core Image 322========================== 323Dual core samples load the M4 core image from flash into the shared ``ocram`` 324region. The M7 core then sets the M4 boot address to this region. The only 325sample currently enabled for dual core builds is the ``openamp`` sample. 326To flash a dual core sample, the M4 image must be flashed first, so that it is 327written to flash. Then, the M7 image must be flashed. The openamp sysbuild 328sample will do this automatically by setting the image order. 329 330The secondary core can be debugged normally in single core builds 331(where the target is ``mimxrt1170_evk/mimxrt1176/cm4``). For dual core builds, the 332secondary core should be placed into a loop, then a debugger can be attached 333(see `AN13264`_, section 4.2.3 for more information) 334 335Launching Images Targeting M4 Core 336================================== 337If building targeting the M4 core, the M7 core must first run code to launch 338the M4 image, by copying it into the ``ocram`` region then kicking off the M4 339core. When building using sysbuild targeting the M4 core, a minimal "launcher" 340image will be built and flashed to the M7 core, which loads and kicks off 341the M4 core. Therefore when developing an application intended to run 342standalone on the M4 core, it is recommended to build with sysbuild, like 343so: 344 345.. zephyr-app-commands:: 346 :zephyr-app: samples/hello_world 347 :board: mimxrt1170_evk/mimxrt1176/cm4 348 :west-args: --sysbuild 349 :goals: flash 350 351If desired, this behavior can be disabled by building with 352``-DSB_CONFIG_SECOND_CORE_MCUX_LAUNCHER=n`` 353 354Configuring a Debug Probe 355========================= 356 357A debug probe is used for both flashing and debugging the board. The on-board 358debugger listed below works with the LinkServer runner by default, or can be 359reprogrammed with JLink firmware. 360 361- MIMXRT1170-EVKB: :ref:`mcu-link-cmsis-onboard-debug-probe` 362- MIMXRT1170-EVK: :ref:`opensda-daplink-onboard-debug-probe` 363 364Using J-Link 365------------ 366 367JLink is the default runner for this board. Install the 368:ref:`jlink-debug-host-tools` and make sure they are in your search path. 369 370There are two options: the onboard debug circuit can be updated with Segger 371J-Link firmware, or :ref:`jlink-external-debug-probe` can be attached to the 372EVK. See `Using J-Link with MIMXRT1170-EVKB`_ or 373`Using J-Link with MIMXRT1160-EVK or MIMXRT1170-EVK`_ for more details. 374 375Using LinkServer 376---------------- 377 378Install the :ref:`linkserver-debug-host-tools` and make sure they are in your 379search path. LinkServer works with the default CMSIS-DAP firmware included in 380the on-board debugger. 381 382Use the ``-r linkserver`` option with West to use the LinkServer runner. 383 384.. code-block:: console 385 386 west flash -r linkserver 387 388Alternatively, pyOCD can be used to flash and debug the board by using the 389``-r pyocd`` option with West. pyOCD is installed when you complete the 390:ref:`gs_python_deps` step in the Getting Started Guide. The runners supported 391by NXP are LinkServer and JLink. pyOCD is another potential option, but NXP 392does not test or support the pyOCD runner. 393 394Configuring a Console 395===================== 396 397We will use the on-board debugger 398microcontroller as a usb-to-serial adapter for the serial console. The following 399jumper settings are default on these boards, and are required to connect the 400UART signals to the USB bridge circuit: 401 402- MIMXRT1170-EVKB: JP2 open (default) 403- MIMXRT1170-EVK: J31 and J32 shorted (default) 404 405Connect a USB cable from your PC to the on-board debugger USB port: 406 407- MIMXRT1170-EVKB: J86 408- MIMXRT1170-EVK: J11 409 410Use the following settings with your serial terminal of choice (minicom, putty, 411etc.): 412 413- Speed: 115200 414- Data: 8 bits 415- Parity: None 416- Stop bits: 1 417 418Flashing 419======== 420 421Here is an example for the :zephyr:code-sample:`hello_world` application. 422 423Before powering the board, make sure SW1 is set to 0001b 424 425.. zephyr-app-commands:: 426 :zephyr-app: samples/hello_world 427 :board: mimxrt1170_evk/mimxrt1176/cm7 428 :goals: flash 429 430Power off the board, and change SW1 to 0010b. Then power on the board and 431open a serial terminal, reset the board (press the SW4 button), and you should 432see the following message in the terminal: 433 434.. code-block:: console 435 436 ***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx ***** 437 Hello World! mimxrt1170_evk 438 439Debugging 440========= 441 442Here is an example for the :zephyr:code-sample:`hello_world` application. 443 444.. zephyr-app-commands:: 445 :zephyr-app: samples/hello_world 446 :board: mimxrt1170_evk/mimxrt1176/cm7 447 :goals: debug 448 449Open a serial terminal, step through the application in your debugger, and you 450should see the following message in the terminal: 451 452.. code-block:: console 453 454 ***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx ***** 455 Hello World! mimxrt1170_evk 456 457ENET1G Driver 458============= 459 460Current default of ethernet driver is to use 100M Ethernet instance ENET. 461To use the 1G Ethernet instance ENET1G, include the overlay to west build with 462the option ``-DEXTRA_DTC_OVERLAY_FILE=nxp,enet1g.overlay`` instead. 463 464.. include:: ../../common/board-footer.rst 465 :start-after: nxp-board-footer 466 467.. _MIMXRT1170-EVK Website: 468 https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt1170-evaluation-kit:MIMXRT1170-EVK 469 470.. _MIMXRT1170-EVK Board Hardware User's Guide: 471 https://www.nxp.com/webapp/Download?colCode=MIMXRT1170EVKHUG 472 473.. _i.MX RT1170 Website: 474 https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-mcus/i-mx-rt1170-crossover-mcu-family-first-ghz-mcu-with-arm-cortex-m7-and-cortex-m4-cores:i.MX-RT1170 475 476.. _i.MX RT1170 Datasheet: 477 https://www.nxp.com/docs/en/data-sheet/IMXRT1170CEC.pdf 478 479.. _i.MX RT1170 Reference Manual: 480 https://www.nxp.com/webapp/Download?colCode=IMXRT1170RM 481 482.. _Using J-Link with MIMXRT1160-EVK or MIMXRT1170-EVK: 483 https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Using-J-Link-with-MIMXRT1160-EVK-or-MIMXRT1170-EVK/ta-p/1529760 484 485.. _Using J-Link with MIMXRT1170-EVKB: 486 https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Using-J-Link-with-MIMXRT1170-EVKB/ta-p/1715138 487 488.. _AN13264: 489 https://www.nxp.com/docs/en/application-note/AN13264.pdf 490 491.. _NXP MCUXpresso for Visual Studio Code: 492 https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/mcuxpresso-for-visual-studio-code:MCUXPRESSO-VSC 493
