1.. _phyboard_polis: 2 3phyBOARD-Polis i.MX8M Mini 4########################## 5 6Overview 7******** 8 9The phyBOARD-Polis, either a development platform for the 10phyCORE-i.MX 8M Mini/Nano, or a powerful, industry-compatible single-board 11computer for immediate implementation of your product idea. As a development 12platform, the phyBOARD-Polis serves as reference design for your 13customer-specific application and enables parallel development of the software 14and carrier board for the phyCORE-i.MX 8M Mini/Nano. 15 16 17As a powerful, industrial single-board computer (SBC), the phyBOARD-Polis is 18equipped with a variety of standard interfaces which are available on standard 19or socket/pin header connectors, while interesting extensions of the 20phyCORE-i.MX 8M Mini/Nano features such as CAN FD, WLAN and an integrated 21TPM chip further extend the range of applications that can be developed with 22the phyCORE-i.MX 8M Mini/Nano. 23 24- Board features: 25 26 - RAM: 512MB - 4GB (LPDDR4) 27 - Storage: 28 29 - 4GB - 128GB eMMC 30 - 8MB - 128MB SPI NOR Flash 31 - microSD Interface 32 - 4kB EEPROM 33 - Wireless: 34 35 - WiFi: 802.11 b/g/n (ac) 2.4 GHz / 5 GHz 36 - BLE 4.2 37 - USB: 38 39 - 1x USB2.0 OTG 40 - 1x USB2.0 41 - Ethernet: 1x 10/100/1000BASE-T 42 - Interfaces: 43 - 1x RS232 / RS485 44 - 2x UART 45 - 3x I²C 46 - 2x SPI 47 - Up to 4x PWM 48 - 4x SAI 49 - 1x MIPI CSI-2 50 - 1x MIPI DSI-2 51 - 2x MMC/SD/SDIO 52 - 1x PCIe (mini PCIE) 53 - LEDs: 54 55 - 1x Status LED (3 Color LED) 56 - 1x Debug UART LED 57 - Debug 58 59 - JTAG 20-pin connector 60 - MicroUSB for UART debug, two COM ports for A53 and M4 61 62.. image:: img/phyBOARD-Polis.jpg 63 :align: center 64 :alt: phyBOARD-Polis 65 :width: 500 66 67More information about the board can be found at the 68`PHYTEC website`_. 69 70Supported Features 71================== 72 73The Zephyr ``phyboard_polis/mimx8mm6/m4`` board target configuration supports 74the following hardware features: 75 76+-----------+------------+-------------------------------------+ 77| Interface | Controller | Driver/Component | 78+===========+============+=====================================+ 79| NVIC | on-chip | nested vector interrupt controller | 80+-----------+------------+-------------------------------------+ 81| SYSTICK | on-chip | systick | 82+-----------+------------+-------------------------------------+ 83| CLOCK | on-chip | clock_control | 84+-----------+------------+-------------------------------------+ 85| PINMUX | on-chip | pinmux | 86+-----------+------------+-------------------------------------+ 87| UART | on-chip | serial port-polling; | 88| | | serial port-interrupt | 89+-----------+------------+-------------------------------------+ 90| GPIO | on-chip | GPIO output | 91| | | GPIO input | 92+-----------+------------+-------------------------------------+ 93| SPI | on-chip | ECSPI | 94+-----------+------------+-------------------------------------+ 95| CAN | MCP2518 | MCP2518 via ECSPI | 96+-----------+------------+-------------------------------------+ 97 98The default configuration can be found in the defconfig file: 99:zephyr_file:`boards/phytec/phyboard_polis/phyboard_polis_mimx8mm6_m4_defconfig`. 100 101It is recommended to disable peripherals used by the M4 core on the Linux host. 102 103Other hardware features are not currently supported with Zephyr on the 104M4-Core. 105 106Connections and IOs 107=================== 108 109The following components are tested and working correctly. 110 111UART: 112----- 113 114Zephyr is configured to use UART4 on the phyBOARD-Polis by default to minimize 115problems with the A53-Core because UART4 is only accessible from the M4-Core. 116 117+---------------+-----------------+-----------------------------------+ 118| Board Name | SoM Name | Usage | 119+===============+=================+===================================+ 120| RS232/485 | UART1 | RS232 / RS485 with flow-control | 121+---------------+-----------------+-----------------------------------+ 122| To WiFi Module| UART2 | UART to WiFi/BLE Module | 123+---------------+-----------------+-----------------------------------+ 124| Debug USB(A53)| UART3 | UART Debug Console via USB | 125+---------------+-----------------+-----------------------------------+ 126| Debug USB(M4) | UART4 | UART Debug Console via USB | 127+---------------+-----------------+-----------------------------------+ 128 129.. note:: 130 Please note, that the to UART2 connected Wifi/BLE Module isn't working with 131 Zephyr yet. 132 133.. warning:: 134 On Boards with the version number 1532.1 UART4 isn't connected to the Debug 135 USB. UART4 connects to pin 10(RX) and 12(TX) on the X8 pinheader. 136 137SPI: 138---- 139 140ECSPI is disabled by default. On phyBOARD-Polis, the SoC's ECSPI3 is not 141usable. 142ECSPI1 is connected to the MCP2518 CAN controller with a chip select. 143Another device can be connected via the expansion header (X8): 144PIN 5, 6, 7, 8 (CS, MOSI, MISO, SCLK). 145ECSPI2 is connected to the TPM module. Currently the TPM module is not 146supported by Zephyr. 147 148.. note:: 149 Please note, that it is necessary to disable ECSPI1 in the Linux devicetree 150 before you can use it on the M4-Core with Zephyr. 151 See section "Disabling Interfaces in Linux" for more information. 152 153LEDs: 154----- 155 156Zephyr has the 3-color status LED configured. The led0 alias (the standard 157Zephyr LED) is configured to be the blue LED. The LED can also light up in red 158and green. 159 160GPIO: 161----- 162 163The pinmuxing for the GPIOs is the standard pinmuxing of the mimx8mm devicetree 164created by NXP. You can find it here: 165 166CAN: 167---- 168 169The MCP2518 is connected via ECSPI1. The CAN interface is disabled by default 170to not interfere with Linux on the A53-Core. 171If you want to use the CAN interface you need to disable ECSPI in the Linux 172devicetree. 173 174.. warning:: 175 There is a bug in the MCP2518 driver that causes the enable pin of the 176 transceiver to be not set. This causes a ENETDOWN error when trying to send 177 a CAN frame. Receiving CAN frames in *listen-only* mode is possible. 178 179The Pinout of the phyBOARD-Polis can be found here: 180 181`PHYTEC website`_ 182 183System Clock 184============ 185 186The M4 Core is configured to run at a 400 MHz clock speed. 187 188 189Programming and Debugging 190************************* 191 192The i.MX8MM does not have a separate flash for the M4-Core. Because of this 193the A53-Core has to load the program for the M4-Core to the right memory 194address, set the PC and start the processor. 195This can be done with U-Boot or Phytec's Linux BSP via remoteproc. 196 197Because remoteproc in Phytec's BSP only writes to the TCM memory area, 198everything was tested in this memory area. 199 200You can read more about remoteproc in Phytec's BSP here: `Remoteproc BSP`_ 201 202These are the memory mapping for A53 and M4: 203 204+------------+-------------------------+------------------------+-----------------------+----------------------+ 205| Region | Cortex-A53 | Cortex-M4 (System Bus) | Cortex-M4 (Code Bus) | Size | 206+============+=========================+========================+=======================+======================+ 207| OCRAM | 0x00900000-0x0093FFFF | 0x20200000-0x2023FFFF | 0x00900000-0x0093FFFF | 256KB | 208+------------+-------------------------+------------------------+-----------------------+----------------------+ 209| TCMU | 0x00800000-0x0081FFFF | 0x20000000-0x2001FFFF | | 128KB | 210+------------+-------------------------+------------------------+-----------------------+----------------------+ 211| TCML | 0x007E0000-0x007FFFFF | | 0x1FFE0000-0x1FFFFFFF | 128KB | 212+------------+-------------------------+------------------------+-----------------------+----------------------+ 213| OCRAM_S | 0x00180000-0x00187FFF | 0x20180000-0x20187FFF | 0x00180000-0x00187FFF | 32KB | 214+------------+-------------------------+------------------------+-----------------------+----------------------+ 215 216For more information about memory mapping see the 217`i.MX 8M Applications Processor Reference Manual`_ (section 2.1.2 and 2.1.3) 218 219At compilation time you have to choose which RAM will be used. This 220configuration is done in 221:zephyr_file:`boards/phytec/phyboard_polis/phyboard_polis_mimx8mm6_m4.dts` 222with "zephyr,flash" and "zephyr,sram" properties. 223 224The following configurations are possible for the flash and sram chosen nodes 225to change the used memory area: 226 227.. code-block:: none 228 229 "zephyr,flash" 230 - &tcml_code 231 - &ocram_code 232 - &ocram_s_code 233 234 "zephyr,sram" 235 - &tcmu_sys 236 - &ocram_sys 237 - &ocram_s_sys 238 239By default Zephyr is configured to use the TCM memory area and CONFIG_XIP is 240disabled. If you want to use the OCRAM memory area you have to enable 241CONFIG_XIP. 242 243Starting the M4-Core via U-Boot 244=============================== 245 246Load the compiled zephyr.bin to memory address 0x4800000. 247This should output something like this: 248 249.. code-block:: console 250 251 u-boot=> tftp 0x48000000 192.168.3.10:zephyr.bin 252 Using ethernet@30be0000 device 253 TFTP from server 192.168.3.10; our IP address is 192.168.3.11 254 Filename 'zephyr.bin'. 255 Load address: 0x48000000 256 Loading: ## 257 2 KiB/s 258 done 259 Bytes transferred = 27240 (6a68 hex) 260 261Because it's not possible to load directly to the TCM memory area you have to 262copy the binaries. The last argument given is the size of the file in bytes, 263you can copy it from the output of the last command. 264 265.. code-block:: console 266 267 u-boot=> cp.b 0x48000000 0x7e0000 27240 268 269And finaly starting the M4-Core at the right memory address: 270 271.. code-block:: console 272 273 u-boot=> bootaux 0x7e0000 274 ## Starting auxiliary core stack = 0x20003A58, pc = 0x1FFE1905... 275 276 277Starting the M4-Core via remoteproc 278=================================== 279 280Copy the zephyr.elf to ``/lib/firmware`` on the target. Maybe a Zephyr sample 281will be included in a future BSP release. 282 283.. note:: 284 In order to use remoteproc you have to add ``imx8mm-phycore-rpmsg.dtbo`` at 285 the end of the line in the ``/boot/bootenv.txt``, then reboot the target. 286 287.. warning:: 288 Remoteproc only reads firmware files from the ``/lib/firmware`` directory! 289 If you try to load a binary from another location unexpected errors will 290 occur! 291 292To load and start a firmware use this commands: 293 294.. code-block:: console 295 296 target$ echo /lib/firmware/zephyr.elf > /sys/class/remoteproc/remoteproc0/firmware 297 target$ echo start > /sys/class/remoteproc/remoteproc0/state 298 [ 90.700611] remoteproc remoteproc0: powering up imx-rproc 299 [ 90.706114] remoteproc remoteproc0: Direct firmware load for /lib/firmware/zephyr.elf failed w2 300 [ 90.716571] remoteproc remoteproc0: Falling back to sysfs fallback for: /lib/firmware/zephyr.elf 301 [ 90.739280] remoteproc remoteproc0: Booting fw image /lib/firmware/zephyr.elf, size 599356 302 [ 90.804448] remoteproc remoteproc0: remote processor imx-rproc is now up 303 304 305The M4-Core is now started up and running. You can see the output from Zephyr 306on UART4. 307 308Debugging 309========= 310 311The phyBOARD-Polis can be debugged using a JTAG Debugger. 312The easiest way to do that is to use a SEGGER JLink Debugger and Phytec's 313``PEB-EVAL-01`` Shield, which can be directly connected to the JLink. 314You can find the JLink Software package here: `JLink Software`_ 315 316.. figure:: img/PEB-EVAL-01.jpg 317 :alt: PEB-EVAL-01 318 :width: 350 319 320 PEB-EVAL-01 321 322To debug efficiently you should use multiple terminals: 323 324(But its also possible to use ``west debug``) 325 326After connecting everything and building with west use this command while in 327the directory of the program you built earlier to start a debug server: 328 329.. code-block:: console 330 331 host$ west debugserver 332 333West automatically connects via the JLink to the Target. And keeps open a 334debug server. 335 336Use another terminal, start gdb, connect to target and load Zephyr on the 337target: 338 339.. code-block:: console 340 341 host$ gdb-multiarch build/zephyr/zephyr.elf -tui 342 (gdb) targ rem :2331 343 Remote debugging using :2331 344 0x1ffe0008 in _vector_table () 345 (gdb) mon halt 346 (gdb) mon reset 347 (gdb) c 348 Continuing. 349 350The program can be debugged using standard gdb techniques. 351 352Disabling Interfaces in Linux 353============================= 354 355If Zephyr is used on the M4-Core while Linux runs on the A53-Core, it is 356recommended to disable the Interfaces used by the M4-Core to avoid conflicts. 357More simple interfaces can be enabled on both cores at the same time, for 358example GPIO. If you do that, keep in mind that conflicts can still arise. 359 360For more complex interfaces like SPI it is necessary to disable them in the 361Linux devicetree, otherwise Linux will probably crash in a panic, resetting 362the SoC. 363For example: disabling ECSPI1 in Linux to use it on the M4-Core with Zephyr: 364 3651. Create a new file called ``disable_spi.dts`` with the following content: 366 367 .. code:: dts 368 369 /dts-v1/; 370 /plugin/; 371 372 / { 373 fragment@0 { 374 target = <&ecspi1>; 375 __overlay__ { 376 status = "disabled"; 377 }; 378 }; 379 }; 380 3812. Compile the file with the dtc compiler to a devicetree blob: 382 383 .. code:: console 384 385 $ dtc -@ -I dts -O dtb -o imx8mm-phyboard-polis-disable-spi.dtbo disable_spi.dts; 386 3873. Copy the compiled file to the boot partition of the target. 3884. Add the filename to the ``/boot/bootenv.txt`` file at the end of the line. 3895. Reboot the target, the SPI interface is now disabled in Linux. 390 391.. _PHYTEC website: 392 https://www.phytec.de/produkte/single-board-computer/phyboard-polis-imx8m-mini/ 393 394.. _phyBOARD-Polis pinout: 395 https://download.phytec.de/Products/phyBOARD-Polis-iMX8M_Mini/TechData/phyCORE-i.MX8M_MINI_Pin_Muxing_Table.A1.xlsx?_ga=2.237582016.1177557183.1660563641-1900651135.1634193918 396 397.. _Remoteproc BSP: 398 https://wiki.phytec.com/pages/releaseview.action?pageId=472257137#L1002e.A3i.MX8MMini/NanoBSPManual-RunningExamplesfromLinuxusingRemoteproc 399 400.. _i.MX 8M Applications Processor Reference Manual: 401 https://www.nxp.com/webapp/Download?colCode=IMX8MMRM 402 403.. _JLink Software: 404 https://www.segger.com/downloads/jlink/ 405
